1

2

3

4

ENA

INA

GND

INB

8

7

6

5

ENB

OUTA

VDD

OUTB

UCC27523

Dual Inverting Inputs

1

2

3

4

ENA

INA

GND

INB

8

7

6

5

ENB

OUTA

VDD

OUTB

UCC27524

Dual Non-Inverting Inputs

1

2

3

4

ENA

INA

GND

INB

8

7

6

5

ENB

OUTA

VDD

OUTB

UCC27525

One Inverting and One

Non-Inverting Input

1

2

3

4

INA-

INB-

GND

OUTB

8

7

6

5

INA+

INB+

OUTA

VDD

UCC27526

Dual Input Configuration

UCC27523, UCC27524, UCC27525, UCC27526

www.ti.com

SLUSAQ3B

– NOVEMBER 2011 – REVISED DECEMBER 2011

Dual 5-A High-Speed Low-Side Gate Driver

Check for Samples: UCC27523, UCC27524, UCC27525, UCC27526

1

FEATURES

APPLICATIONS

2

•

Industry-Standard Pin Out

•

Switch-Mode Power Supplies

•

Two Independent Gate-Drive Channels

•

DC-to-DC Converters

•

5-A Peak Source/Sink Drive Current

•

Motor Control, Solar Power

•

Independent Enable Function for Each Output

•

Gate Drive for Emerging Wide Band Gap

Power Devices such as GaN

•

TTL/CMOS Compatible Logic Threshold

Independent of Supply Voltage

DESCRIPTION

•

Hysteretic Logic Thresholds for High Noise

The UCC2752x family of devices are dual-channel,

Immunity

high-speed, low-side gate driver devices capable of

•

Inputs and Enable Pin Voltage Levels Not

effectively

driving

MOSFET

and

IGBT

power

Restricted by VDD Pin bias Supply Voltage

switches. Using a design that inherently minimizes

•

4.5-V to 18-V Single Supply Range

shoot-through current, UCC2752x is capable of

delivering high-peak current pulses of up to 5-A/5-A

•

Outputs Held Low During VDD UVLO, (ensures

source/sink into capacitive loads along with rail-to-rail

glitch-free operation at power-up and

drive capability and extremely small propagation

power-down)

delay typically 13 ns. In addition, the drivers feature

•

Fast Propagation Delays (13-ns typical)

matched internal propagation delays between the two

•

Fast Rise/Fall Times (7-ns / 6-ns typical)

channels which are very well suited for applications

requiring dual-gate drives with critical timing, such as

•

1-ns Typical Delay Matching Between

synchronous rectifiers. This also enables connecting

2-Channels

two channels in parallel to effectively increase current

•

Two Outputs can be Paralleled for Higher

drive capability or driving two switches in parallel with

Drive Current

a single input signal. The input pin thresholds are

based on TTL/CMOS compatible low-voltage logic,

•

Outputs Held in LOW When Inputs Floating

which is fixed and independent of the VDD supply

•

PDIP-8, SOIC-8, MSOP-8 PowerPAD

™ and

voltage. Wide hysteresis between the high and low

3-mm x 3-mm WSON-8 Package Options

thresholds offers excellent noise immunity.

•

Operating Temperature Range of -40

°C to

140

°C

Product Matrix

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright

© 2011, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.