W9425G8EH

Publication Release Date: Jul. 04, 2008

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Revision A01

7.10.2

Addressing Mode Select (A3)...............................................................................................15

7.10.3

CAS Latency field (A6 to A4)................................................................................................16

7.10.4

DLL Reset bit (A8)................................................................................................................16

7.10.5

Mode Register /Extended Mode register change bits (BS0, BS1) ........................................16

7.10.6

Extended Mode Register field ..............................................................................................16

7.10.7

Reserved field ......................................................................................................................16

8.

OPERATION MODE...................................................................................................................... 17

8.1

Simplified Truth Table.......................................................................................................... 17

8.2

Function Truth Table ........................................................................................................... 18

8.3

Function Truth Table for CKE.............................................................................................. 21

8.4

Simplified Stated Diagram................................................................................................... 22

9.

ELECTRICAL CHARACTERISTICS ............................................................................................. 23

9.1

Absolute Maximum Ratings................................................................................................. 23

9.2

Recommended DC Operating Conditions........................................................................... 23

9.3

Capacitance......................................................................................................................... 24

9.4

Leakage and Output Buffer Characteristics ........................................................................ 24

9.5

DC Characteristics............................................................................................................... 25

9.6

AC Characteristics and Operating Condition....................................................................... 26

9.7

AC Test Conditions.............................................................................................................. 27

10. SYSTEM CHARACTERISTICS FOR DDR SDRAM ..................................................................... 30

10.1 Table 1: Input Slew Rate for DQ, DQS, and DM................................................................. 30

10.2 Table 2: Input Setup & Hold Time Derating for Slew Rate.................................................. 30

10.3 Table 3: Input/Output Setup & Hold Time Derating for Slew Rate...................................... 30

10.4 Table 4: Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate ...................... 30

10.5 Table 5: Output Slew Rate Characteristics (X8 Devices only)............................................ 30

10.6 Table 6: Output Slew Rate Matching Ratio Characteristics ................................................ 31

10.7 Table 7: AC Overshoot/Undershoot Specification for Address and Control Pins ............... 31

10.8 Table 8: Overshoot/Undershoot Specification for Data, Strobe, and Mask Pins ................ 32

10.9 System Notes: ..................................................................................................................... 33

11. TIMING WAVEFORMS.................................................................................................................. 35

11.1 Command Input Timing ....................................................................................................... 35

11.2 Timing of the CLK Signals................................................................................................... 35

11.3 Read Timing (Burst Length = 4) .......................................................................................... 36

11.4 Write Timing (Burst Length = 4) .......................................................................................... 37

11.5 DM, DATA MASK (W9425G8EH) ....................................................................................... 38

11.6 Mode Register Set (MRS) Timing ....................................................................................... 39

11.7 Extend Mode Register Set (EMRS) Timing......................................................................... 40