ISL97649A

8

FN7928.0

December 5, 2011

Input Data Set-up Time

window, to SCL rising edge crossing 30% of

40

ns

Input Data Hold Time

0ns

STOP Condition Set-up Time

400

ns

STOP Condition Hold Time for Read, or

Volatile Only Write

From SDA rising edge to SCL falling edge;

400

ns

Capacitive on SCL

5pF

Capacitive on SDA

5pF

Non-Volatile Write Cycle Time

25

ms

EEPROM Endurance

1

kCyc

EEPROM Retention

88

kHrs

NOTES:

6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization

and are not production tested.

12. Established by design. Not a parametric spec.

13. Boost will stop switching as soon as boost output reaches OVP threshold.

14. Compliance to limits is assured by characterization and design.

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

(Note 14)

TYP

(Note 7)

MAX

(Note 14)

UNITS

i

1 255

,

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