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SI9140DQ-T1 Datasheet(PDF) 7 Page - Vishay Siliconix |
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SI9140DQ-T1 Datasheet(HTML) 7 Page - Vishay Siliconix |
7 / 19 page Si9140 Vishay Siliconix Document Number: 70026 S-40699—Rev. H, 19-Apr-04 www.vishay.com 7 PIN DESCRIPTION Pin 1: VDD The positive power supply for all functional blocks except output driver. A bypass capacitor of 0.1 mF (minimum) is recommended. Pin 2: MON Non-inverting input of a comparator. Inverting input is tied internally to reference voltage. This comparator is typically used to monitor the output voltage and to flag the processor when the output voltage falls out of regulation. Pin 3: VGOOD This is an open drain output. It will be held at ground when the voltage at MON (Pin 2) is less than the internal reference. An external pull-up resistor will pull this pin high if the MON pin (Pin 2) is higher than the VREF. (Refer to Pin 2 description.) Pin 4: COMP This pin is the output of the error amplifier. A compensation network is connected from this pin to the FB pin to stabilize the system. This pin drives one input of the internal pulse width modulation comparator. Pin 5: FB The inverting input of the error amplifier. An external resistor divider is connected to this pin to set the regulated output voltage. The compensation network is also connected to this pin. Pin 6: NI The non-inverting input of the error amplifier. In normal operation it is externally connected to VREF or an external reference. Pin 7: VREF This pin supplies a 1.5-V reference. Pin 8: GND (Ground) Pin 9: ENABLE A logic high on this pin allows normal operation. A logic low places the chip in the standby mode. In standby mode normal operation is disabled, supply current is reduced, the oscillator stops and DS goes high while DR goes low. Pin 10: ROSC A resistor connected from this pin to ground sets the oscillator’s capacitor COSC, charge and discharge current. See the oscillator section of the description of operation. Pin 11: COSC An external capacitor is connected to this pin to set the oscillator frequency. fOSC ] 0.75 ROSC COSC (at VDD = 5.0 V) Pin 12: UVLOSET This pin will place the chip in the standby mode if the UVLOSET voltage drops below 1.2 V. Once the UVLOSET voltage exceeds 1.2 V, the chip operates normally. There is a built-in hysteresis of 165 mV. Pin 13: PGND The negative return for the VS supply. Pin 14: DS This CMOS push-pull output pin drives the external p-channel MOSFET. This pin will be high in the standby mode. A break-before-make function between DS and DR is built-in. Pin 15: DR This CMOS push-pull output pin drives the external n-channel MOSFET. This pin will be low in the standby mode. A break-before-make function between the DS and DR is built-in. Pin 16: VS The positive terminal of the power supply which powers the CMOS output drivers. A bypass capacitor is required. |
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