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SI9166BQ-T1-E3 Datasheet(PDF) 7 Page - Vishay Siliconix |
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SI9166BQ-T1-E3 Datasheet(HTML) 7 Page - Vishay Siliconix |
7 / 11 page Si9166 Vishay Siliconix Document Number: 70847 S-40701—Rev. C, 19-Apr-04 www.vishay.com 7 PWM Mode With PWM/PSM mode pin in logic high condition, the Si9166 operates in constant frequency (PWM) mode. As the load and line varies, switching frequency remain constant. The switching frequency is programmed by the ROSC value. In the PWM mode, the synchronous drive is always enabled, even when the output current reaches 0 A. Therefore, the converter always operates in continuous conduction mode (CCM) if a synchronous switch is used. In CCM, transfer function of the converter remains almost constant, providing fast transient response. If the converter operates in discontinuous conduction mode (DCM), overall loop gain decreases and transient response time can be ten times longer than if the converter remain in continuous current mode. This transient response time advantage can significantly decrease the hold-up capacitors needed on the output of dc/dc converter to meet the transient voltage regulation. The PWM/PSM pin is available to dynamically program the controller. If the synchronous rectifier switch is not used, the converter will operate in DCM at light load. The maximum duty cycle of the Si9166 can reach 100% in buck mode. The duty cycle will continue to increase as the input voltage decreases until it reaches 100%. This allows the system designers to extract the maximum stored energy from the battery. Once the controller delivers 100% duty cycle, the converter operates like a saturated linear regulator. At 100% duty cycle, synchronous rectification is completely turned off. Up to 80% maximum duty cycle at 2-MHz switching frequency, the controller maintains perfect output voltage regulation. If the input voltage drops below the level where the converter requires greater than 80% duty cycle, the controller will deliver 100% duty cycle. This instantaneous jump in duty cycle is due to fixed BBM time, MOSFET delay/rise/fall time, and the internal propagational delays. In order to maintain regulation, controller might fluctuate its duty cycle back and forth from 100% to something lower than 80% while the converter is operating in this input voltage range. If the input voltage drops further, controller will remain on 100%. If the input voltage increases to a point where it’s requiring less than 80% duty cycle, synchronous rectification is once again activated. The maximum duty cycle under boost mode is internally limited to 70% to prevent inductor saturation. If the converter is turned on for 100% duty cycle, inductor never gets a chance to discharge its energy and eventually saturate. In boost mode, synchronous rectifier is always turned on for minimum or greater duration as long as the switch has been turned on. The controller will deliver 0% duty cycle, if the input voltage is greater than the programmed output voltage. Because of signal propagation time and MOSFET delay/rise/fall time, controller will not transition smoothly from minimum controllable duty cycle to 0% duty cycle. For example, controller may decrease its duty cycle from 5% to 0% abruptly, instead of gradual decrease you see from 70% to 5%. Pulse Skipping Mode The gate charge losses produced from the Miller capacitance of MOSFETs are the dominant power dissipation parameter during light load (i.e. < 10 mA). Therefore, less gate switching will improve overall converter efficiency. This is exactly why the Si9166 is designed with pulse skipping mode. If the PWM/PSM pin is connected to logic low level, converter operates in pulse skipping modulation (PSM) mode. During the pulse skipping mode, quiescent current of the controller is decreased to approximately 200 mA, instead of 500 mA during the PWM mode. This is accomplished by turning off most of internal control circuitry and utilizing a simple constant on-time control with feedback comparator. The controller is designed to have a constant on-time and a minimum off-time acting as the feedback comparator blanking time. If the output voltage drops below the desired level, the main switch is first turned on and then off. If the applied on-time is insufficient to provide the desired voltage, the controller will force another on and off sequence, until the desired voltage is accomplished. If the applied on-time forces the output to exceed the desired level, as typically found in the light load condition, the converter stays off. The excess energy is delivered to the output slowly, forcing the converter to skip pulses as needed to maintain regulation. The on-time and off-time are set internally based on inductor used (1.5-mH typical), MODE pin selection and maximum load current. Therefore, with this control method, duty cycle ranging from 0 to near 100% is possible depending on whether buck or boost is chosen. In pulse skipping mode, synchronous rectifier drive is also disabled to further decrease the gate charge loss and increase overall converter efficiency. Reference The reference voltage for the Si9166 is set at 1.3 V. The reference voltage is internally connected to the non-inverting inputs of the error amplifier. The reference pin requires 0.1-mF decoupling capacitor. Error Amplifier The error amplifier gain-bandwidth product and slew rate are critical parameters which determines the transient response of converter. The transient response is function of both small and large signal responses. The small signal response is determined by the feedback compensation network while the large signal is determined by the error amplifier dv/dt and the inductor di/dt slew rate. Besides the inductance value, error amplifier determines the converter response time. In order to minimize the response time, the Si9166 is designed with 2-MHz error amplifier gain-bandwidth product to generate the widest converter bandwidth and 3.5 V/msec slew rate for ultra-fast large signal response. |
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