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MAX11043 Datasheet(PDF) 3 Page - Maxim Integrated Products |
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MAX11043 Datasheet(HTML) 3 Page - Maxim Integrated Products |
3 / 33 page 4-Channel, 16-Bit, Simultaneous-Sampling ADCs with PGA, Filter, and 8-/12-Bit Dual-Stage DAC _______________________________________________________________________________________ 3 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE (PGA Enabled, PGA Gain = 8 x (25kHz -1dB Full-Scale Signal)) Maximum Full-Scale Input ADC modulator gain = 1 150 mVP-P Input-Referred Noise Spectral Density 100kHz 20 nV/√Hz Second Harmonic to Fundamental -92 dB Third Harmonic to Fundamental -94 dB Spurious-Free Dynamic Range SFDR 92 dB Channel-to-Channel Isolation Unused channels are shorted and unconnected 110 dB Channel Phase Matching Between all channels, including complete analog signal path -0.05 +0.05 Degrees DYNAMIC PERFORMANCE (PGA Enabled, PGA Gain = 16 x (25kHz -1dB Full-Scale Signal)) Maximum Full-Scale Input ADC modulator gain = 1 75 mVP-P Input-Referred Noise Spectral Density 100kHz 15 nV/√Hz Second Harmonic to Fundamental -99 dB Third Harmonic to Fundamental -93 dB Spurious-Free Dynamic Range SFDR 93 dB Channel-to-Channel Isolation Unused channels are shorted and unconnected 106 dB Channel Phase Matching Between all channels, including complete analog signal path -0.075 +0.075 Degrees DYNAMIC PERFORMANCE (EQ Mode (5kHz -1dB Full-Scale Signal, CONFIG_ Register Bit 3 = 1)) Maximum Full-Scale Input ADC modulator gain = 1 (Note 2) 800 mVP-P Input-Referred Noise Spectral Density 100kHz 6 nV/√Hz Second Harmonic to Fundamental -80 -90 dB Third Harmonic to Fundamental -77 -98 dB Spurious-Free Dynamic Range SFDR Input referred (Note 3) 77 89 dB ELECTRICAL CHARACTERISTICS (continued) (VAVDD = +3.0V to +3.6V, VDVDD = +3.0V, CDVREG = 10µF, VAGND = VDGND = 0V, common-mode input voltage = VAVDD/2, VREFBP = VREFA = VREFB = VREFC = VREFD = +2.5V (external reference), VREFDAC = VREFDACH = +1.25V (external reference), VREFDACL = 0V, CREFBP = CREFA = CREFB = CREFC = CREFD = CREFDAC = 1µF, fSCLK = 38.4MHz, fEXCLK = 38.4MHz (external clock applied to OSCIN), clock divider set to 4, SHDN = DACSTEP = UP/DWN = DGND, CONVRUN = DVDD, all analog inputs driven directly through a series 150 Ω/330pF anti-alias filter, PGA gain = 1. Default filters and gain settings. DIFF = 1. TA = TMIN to TMAX, unless otherwise noted (Note 1). Typical values are at TA = +25°C.) |
Similar Part No. - MAX11043 |
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Similar Description - MAX11043 |
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