LPC11U24FBD48 datasheet(9/67 Pages) PHILIPS

Part #	LPC11U24FBD48

Description	32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash; up to 10 kB SRAM and 4 kB EEPROM; USB device; USART

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Manufacturer	PHILIPS [NXP Semiconductors]

Direct Link	http://www.nxp.com

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LPC11U2X

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Preliminary data sheet

Rev. 1 — 29 November 2011

9 of 67

NXP Semiconductors

LPC11U2x

32-bit ARM Cortex-M0 microcontroller

6.2 Pin description

Table 3 shows all pins and their assigned digital or analog functions in order of the GPIO

port number. The default function after reset is listed first. All port pins have internal

pull-up resistors enabled after reset except for the true open-drain pins PIO0_4 and

PIO0_5.

Every port pin has a corresponding IOCON register for programming the digital or analog

function, the pull-up/pull-down configuration, the repeater, and the open-drain modes.

The USART, counter/timer, and SSP functions are available on more than one port pin.

Table 3.

Pin description

Symbol

Reset

state

[1]

Type

Description

RESET/PIO0_0

2

C1

3

4

[2]

I; PU

I

RESET — External reset input with 20 ns glitch filter.

A LOW-going pulse as short as 50 ns on this pin

resets the device, causing I/O ports and peripherals to

take on their default states, and processor execution

to begin at address 0. This pin also serves as the

debug select input. LOW level selects the JTAG

boundary scan. HIGH level selects the ARM SWD

debug mode.

-

I/O

PIO0_0 — General purpose digital input/output pin.

PIO0_1/CLKOUT/

CT32B0_MAT2/

USB_FTOGGLE

3C2

4

5

[3]

I; PU

I/O

PIO0_1 — General purpose digital input/output pin. A

LOW level on this pin during reset starts the ISP

command handler or the USB device enumeration.

-O

CLKOUT — Clockout pin.

-O

CT32B0_MAT2 — Match output 2 for 32-bit timer 0.

-O

USB_FTOGGLE — USB 1 ms Start-of-Frame signal.

PIO0_2/SSEL0/

CT16B0_CAP0

8F1

10

13

[3]

I; PU

I/O

PIO0_2 — General purpose digital input/output pin.

-

I/O

SSEL0 — Slave select for SSP0.

-I

CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.

PIO0_3/USB_VBUS

9

H2

14

19

[3]

I; PU

I/O

PIO0_3 — General purpose digital input/output pin. A

LOW level on this pin during reset starts the ISP

command handler. A HIGH level during reset starts

the USB device enumeration.

-I

USB_VBUS — Monitors the presence of USB bus

power.

PIO0_4/SCL

10

G3

15

20

[4]

I; IA

I/O

PIO0_4 — General purpose digital input/output pin

(open-drain).

-

I/O

SCL — I2C-bus clock input/output (open-drain).

High-current sink only if I2C Fast-mode Plus is

selected in the I/O configuration register.

PIO0_5/SDA

11

H3

16

21

[4]

I; IA

I/O

PIO0_5 — General purpose digital input/output pin

(open-drain).

-

I/O

SDA — I2C-bus data input/output (open-drain).

High-current sink only if I2C Fast-mode Plus is

selected in the I/O configuration register.

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