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HI-3110PCIF Datasheet(PDF) 7 Page - Holt Integrated Circuits |
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HI-3110PCIF Datasheet(HTML) 7 Page - Holt Integrated Circuits |
7 / 53 page binary value of this 4-bit field specifies the number of data bytes in the data payload (0 - 8 bytes). All binary combinations greater than or equal to <1 0 0 0> specify 8 bytes of data. The remaining fields of the extended data frame (Data field, CRC field, acknowledge field, EOF field and IFS field) are constructed in the same way as the standard frame format. The remote frame is shown in figure 4. The function of remote frames is to allow a receiver which periodically receives certain types of data to request that data from the transmitting source. The identifier of the remote frame must be identical to the identifier of the requested transmitting node’s data frame and the data length code (DLC) should be equal to the DLC of the requested data. For this reason, ARINC 825 strongly discourages the use of remote frames. The format of a remote frame is identical to the format of the corresponding data frame except the remote frame has no data payload. Remote frames and data frames are distinguished by a recessive RTR bit in the remote frame. This means if a receiver sends a remote frame and the sending node transmits at the same time, the sending node (with a dominant RTR bit) will win arbitration and the requesting node will receive the desired data immediately. The error frame is shown in figure 5. Any node detecting an error generates an error frame. The error frame consists of two fields, the error flag field and the error delimiter. The type of error flag field depends on the error status of the node, error-active or error-passive (see below). An error- active node generates an active error flag and an error- passive node generates a passive error flag. An active error flag consists of 6 consecutive dominant bits. This condition violates the rule of bit-stuffing and causes all other nodes on the bus to generate error flags, known as echo error flags. Therefore, the error flag field will consist of the superposition of different error flags sent by individual nodes, resulting in a minimum of 6 and maximum of 12 consecutive dominant bits. The error flag field is followed by the error delimiter, consisting of 8 recessive bits. A passive error flag consists of 6 recessive bits. This is followed by the 8 recessive bits of the error delimiter. Therefore, an error frame sent by an error- passive node consists of 14 consecutive recessive bits. Since this will not disturb the bus, a transmitting node will continue to transmit unless it detects the error itself, or another error-active node detects the error. If the passive error flag is generated by a receiver, it cannot prevail over any other activity on the bus. Therefore, it must wait for 6 consecutive bits of equal polarity before completing the error flag. If the passive error flag is generated by a transmitter, the bit stuffing rule is violated and it will cause other nodes to generate error flags. Two exceptions to this rule are a) the passive error flag starts during arbitration and another node prevails and begins transmitting, and b) the error flag starts less than 6 bits before the end of the CRC sequence and the last bits of the CRC sequence all happen to be recessive. The overload frame is shown in figure 6. It has the same format as the active error frame, consisting of an overload flag field and an overload delimiter. The overload flag consists of 6 consecutive dominant bits. This condition violates the rule of bit-stuffing and causes all other nodes on the bus to generate echo flags, similar to the active error flag echos. Therefore, the overload flag field will consist of the superposition of different overload flags sent by individual nodes, resulting in a minimum of 6 and maximum of 12 consecutive dominant bits. The overload flag is followed by the overload delimiter, consisting of 8 recessive bits. An overload frame, unlike an error frame, can only be generated during the interframe space. There are two types of overload frame: , resulting from a) detection of a dominant bit during the first or second bit of intermission, b) detection of a dominant bit at the last (seventh) bit of EOF in received frames, or c) detection of a dominant bit at the last (eighth) bit of an error delimiter or overload delimiter. The reactive overload frame is started one bit after detecting any of the above dominant bit conditions. A node which is unable to begin reception of the next message due to internal conditions may request a delay by transmitting a maximum of two consecutive overload frames. The requested overload frame must be started at the first bit of an expected intermission. The HI-3110 will never initiate an overload frame unless reacting to one of the conditions in case 1) above. Initiation of overload frames is prohibited by ARINC 825 since they increase the network loading. Note: REMOTE FRAME Simultaneous transmission of remote frames with the same identifier and different DLCs will lead to unresolvable collisions on the bus. ERROR FRAME Active Error Flag: Passive Error Flag: Notes: OVERLOAD FRAME 1) Reactive Overload Frame 2) Requested Overload Frame. Note 1): Note 2): HI-3110 HOLT INTEGRATED CIRCUITS 7 |
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