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LV5232VH Datasheet(PDF) 6 Page - Sanyo Semicon Device |
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LV5232VH Datasheet(HTML) 6 Page - Sanyo Semicon Device |
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6 / 8 page  LV5232VH No.A1628-6/8 Timing conditions Parameter symbol Conditions min typ max unit Clock frequency fs1 SCK Duty = 50% 10 MHz Clock pulse width twck SCK 50 ns Latch pulse width twla LATCH 50 ns Data set up time ts1 SDATAIN setup time relative to the rise of SCK 25 ns Data hold time th1 SDATAIN data hold time relative to the rise of SCK 25 ns Clock latch time tla1 100 ns Input conditions 1 ton SCK and SDATAIN rise time 100 ns Input conditions 2 toff SCL and SDATAIN fall time 100 ns SOUT output timings Parameter symbol Conditions min typ max unit SOUT delay time 1 tdso1 The time from a SCK falling edge to SOUT rising edge 50 MHz SOUT delay time 2 tdso2 The time from a SCK falling edge to SOUT falling edge 50 ns 2.5V 2.5V SCK SDATAIN LATCH 2.5V 2.5V ts1 10% 90% 10% 90% th1 2.5V 2.5V tla1 twla toff ton twck 2.5V SCK SOUT 2.5V 2.5V tdso1 2.5V tdso2 |
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