LE24LB1283

No.A1706-7/14

4 Acknowledge

During data transfer, 8-bits are transferred in succession, and then in the ninth clock cycle period the device on the

system bus receiving the data sets the SDA line to low, and sends the acknowledge signal indicating that the data has

been received. The acknowledge signal is not sent during an EEPROM internal write operation.

5 Device addressing

For the purposes of communication, the master device in the system generates the start condition for the slave device

(EEPROM). Communication with a particular slave device is enabled by sending along the SDA bus the device

address, which is 7-bits long, and the read/write command code, which is 1 bit long, immediately following the start

condition.

The upper four bits of the device address are called the device code which, for this product, is fixed as “1010.” Two

or more pieces cannot be connected about this IC because there is no slave address.

This product can connect EEPROM devices up to eight on the system bus by having slave address S0, S1, and S2 in

three bits following the device code, and setting the slave address with S0 pin, S1 pin and S2 pin when the substrate is

mounted.

Device code + slave address input from SDA and the slave address set when this product device code + slave address

for mounted are compared, this product returns the acknowledge for the period of the ninth clock cycle when agreeing,

and the Read or the Write operates according to Read/Write instruction code. It becomes a standby mode if not

agreeing. When reading is executed immediately after the slave device was switched, the random lead command is

used.

1

0

1

0

S2

S1

S0

R/W

LE24LB1283

Device Code

Slave

Address

MSB

LSB

Device address word

SCL

tAA

SDA

tDH

SDA

1

8

9

Start

condition

(EEPROM input)

(Master output)

(EEPROM output)

Acknowlwdge

bit output