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6 page 
www.vishay.com 6 Document Number: 68379 S11-1430-Rev. D, 18-Jul-11 Vishay Siliconix DG2722 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TEST CIRCUITS Figure 1. Switching Time Switch Input CL (includes fixture and stray capacitance) V+ OE HSD1± or HSD2± CL 35 pF D± Logic Input RL 50 VOUT GND V+ 50 % 0 V Logic Input Switch Output tON tOFF Logic "1" = Switch on Logic input waveforms inverted for switches that have the opposite logic sense. 0 V Switch Output D± R L R L R ON 0.9 x VOUT tr 5 ns tf 5 ns VINH VINL Ω = + < < ( ) S VOUT Figure 2. Break-Before-Make Interval CL (includes fixture and stray capacitance) HSD2± VHSD1± HSD1± VHSD2± 0 V Logic Input Switch Output VO HSD1± = HSD2± tr < 5 ns tf < 5 ns 90 % tD tD OE D± V+ GND V+ CL 35 pF VO RL 50 Ω VINL VINH S Figure 3. Charge Injection Off On On IN VOUT VOUT Q = OUT x CL CL = 1 nF Rgen VOUT D± VIN = 0 - V+ OE GND V+ V+ IN depends on switch configuration: input polarity determined by sense of switch. + HSD1± or HSD2± Vgen S |
