 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
HT82B60R Datasheet(PDF) 13 Page - Holtek Semiconductor Inc |
|
||||||||||||||||||||||||||||||
HT82B60R Datasheet(HTML) 13 Page - Holtek Semiconductor Inc |
|
|
13 / 70 page  HT82B60R Rev. 1.10 13 February 1, 2011 The Z, OV, AC and C flags generally reflect the status of the latest operations. · C is set if an operation results in a carry during an ad- dition operation or if a borrow does not take place dur- ing a subtraction operation; otherwise C is cleared. C is also affected by a rotate through carry instruction. · AC is set if an operation results in a carry out of the low nibbles in addition, or no borrow from the high nib- ble into the low nibble in subtraction; otherwise AC is cleared. · Z is set if the result of an arithmetic or logical operation is zero; otherwise Z is cleared. · OV is set if an operation results in a carry into the high- est-order bit but not a carry out of the highest-order bit, or vice versa; otherwise OV is cleared. · PDF is cleared by a system power-up or executing the ²CLR WDT² instruction. PDF is set by executing the ²HALT² instruction. · TO is cleared by a system power-up or executing the ²CLR WDT² or ²HALT² instruction. TO is set by a WDT time-out. In addition, on entering an interrupt sequence or execut- ing a subroutine call, the status register will not be pushed onto the stack automatically. If the contents of the status registers are important and if the interrupt rou- tine can change the status register, precautions must be taken to correctly save it. Interrupt Control Registers - INTC0, INTC1 The microcontrollers provide two internal timer/event counter overflow interrupts, one USB interrupt, a com- bined SPI/I 2C interrupt and an external pin interrupt. By setting various bits within these registers using standard bit manipulation instructions, the enable/disable func- tion of each interrupt can be independently controlled. A master interrupt bit within this register, the EMI bit, acts like a global enable/disable and is used to set all of the interrupt enable bits on or off. This bit is cleared when an interrupt routine is entered to disable further interrupt and is set by executing the ²RETI² instruction. Timer/Event Counter Registers - TMR0, TMR0C, TMR1H, TMR1L, TMR1C Both devices possess a single internal 8-bit count-up timer. An associated register known as TMR0 is the lo- cation where the timers 8-bit value is located. This regis- ter can also be preloaded with fixed data to allow different time intervals to be setup. An associated con- trol register, known as TMR0C, contains the setup infor- mation for this timer, which determines in what mode the timer is to be used as well as containing the timer on/off control function. All devices possess one internal 16-bit count-up timer. An associated register pair known as TMR1L/TMR1H is the location where the timer 16-bit value is located. This register can also be preloaded with fixed data to allow different time intervals to be setup. An associated con- trol register, known as TMR1C, contains the setup infor- mation for this timer, which determines in what mode the timer is to be used as well as containing the timer on/off control function. Input/Output Ports and Control Registers Within the area of Special Function Registers, the I/O registers and and their associated control registers play a prominent role. All I/O ports have a designated regis- ter correspondingly labeled as PA, PB, PC, PD, PE and PF0~PF1. These labeled I/O registers are mapped to specific addresses within the Data Memory as shown in the Data Memory table, which are used to transfer the appropriate output or input data on that port. With each I/O port there is an associated control register labeled PAC, PBC, PCC, PDC, PEC and PFC, also mapped to specific addresses with the Data Memory. The control register specifies which pins of that port are set as inputs and which are set as outputs. To setup a pin as an input, the corresponding bit of the control reg- ister must be set high, for an output it must be set low. During program initialisation, it is important to first setup the control registers to specify which pins are outputs and which are inputs before reading data from or writing data to the I/O ports. One flexible feature of these regis- ters is the ability to directly program single bits using the T O P D F O V Z A C C S T A T U S R e g i s t e r A r i t h m e t i c / L o g i c O p e r a t i o n F l a g s C a r r y f l a g A u x i l i a r y c a r r y f l a g Z e r o f l a g O v e r f l o w f l a g S y s t e m M a n a g e m e n t F l a g s P o w e r d o w n f l a g W a t c h d o g t i m e - o u t f l a g N o t i m p l e m e n t e d , r e a d a s " 0 " b 7 b 0 Status Register |
Similar Part No. - HT82B60R |
|
Similar Description - HT82B60R |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
