LNK562-564

7

Rev. H 11/08

Output Diode

For best performance, the area of the loop connecting the

secondary winding, the output diode and the output filter

capacitor should be minimized. In addition, sufficient copper

area should be provided at the anode and cathode terminals

of the diode for heat sinking. A larger area is preferred at the

quiet cathode terminal. A large anode area can increase high-

frequency radiated EMI.

Quick Design Checklist

As with any power supply design, all LinkSwitch-LP designs

should be verified on the bench to make sure that component

specifications are not exceeded under worst-case conditions.The

following minimum set of tests is strongly recommended:

1. Maximum drain voltage – Verify that V

650 V at the highest input voltage and peak (overload) output

power. A 50 V margin to the 700 V BV

margin for design variation, especially in Clampless designs.

2. Maximum drain current – At maximum ambient

temperature, maximum input voltage and peak output

(overload) power, verify drain current waveforms for any

signs of transformer saturation and excessive leading-edge

current spikes at startup. Repeat under steady state conditions

and verify that the leading-edge current spike event is below

I

maximum DRAIN current should be below the specified

absolute maximum ratings.

3. Thermal Check – At specified maximum output

power, minimum input voltage and maximum ambient

temperature, verify that the temperature specifications

are not exceeded for LinkSwitch-LP, transformer, output

diode and output capacitors. Enough thermal margin

should be allowed for part-to-part variation of the R

LinkSwitch-LP as specified in the data sheet. Under low line

andmaximumpower,amaximumLinkSwitch-LPSOURCEpin

temperature of 100 °C is recommended to allow for

these variations.

Design Tools

Up-to-date information on design tools can be found at the

Power Integrations web site: www.powerint.com.

+

HV DC

INPUT

-

+

Input Filter

Capacitor

-

DC

OUT

PI-4582-021407

Maximize hatched copper

areas (

) for optimum

heatsinking

TOP VIEW

T ransformer

D

FB

BP

S

S

S

S

Output Filter

Capacitor

Figure 7. Recommended Circuit Board Layout for LinkSwitch-LP using D Package (Assumes a HVDC Input Stage).