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TMS320C5533 Datasheet(PDF) 6 Page - Texas Instruments |
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TMS320C5533 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 155 page  TMS320C5535 TMS320C5534, TMS320C5533, TMS320C5532 SPRS737 – AUGUST 2011 www.ti.com 2 Device Overview 2.1 Device Differences Table 2-1 lists the important differences between all four devices, including on-chip RAM, peripheral support, and LDOs. Table 2-1. Device Differences Device Digital Core Supply On-chip On-chip USB LCD Tightly- SAR LDO Voltage (CVDD) DARAM SARAM Interface Coupled ADC FFT 1.05 V 1.3 V Maximum CPU Speed TMS320C5535A05 50 MHz - ANA, DSP, 64 KB 256 KB x(1) x x x and USB TMS320C5535A10 50 MHz 100 MHz TMS320C5534A05 50 MHz - ANA, DSP, 64 KB 192 KB x -(2) - - and USB TMS320C5534A10 50 MHz 100 MHz TMS320C5533A05 50 MHz - ANA and 64 KB 64 KB x - - - USB TMS320C5533A10 50 MHz 100 MHz TMS320C5532A05 50 MHz - 64 KB 0 KB - - - - ANA only TMS320C5532A10 50 MHz 100 MHz (1) x — Supported (2) - — Not supported 2.2 Device Characteristics Table 2-2 through Table 2-5 provide an overview of all four devices. The tables show significant features of each device, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type with pin count. For more detailed information on the actual device part number and maximum device operating frequency, see Section 7.1.2, Device and Development-Support Tool Nomenclature. Table 2-2. Characteristics of the 'C5535 Processor HARDWARE FEATURES TMS320C5535A05, 'C5535A10 Peripherals Not all peripheral pins are Four DMA controllers each with four channels, available at the same time DMA for a total of 16 channels (for more detail, see the Device Configurations section). 2 32-Bit General-Purpose (GP) Timers Timers 1 Additional Timer Configurable as a 32-Bit GP Timer and/or a Watchdog UART 1 (with RTS/CTS flow control) SPI 1 with 4 chip selects I2C 1 (Master/Slave) I2S 4 (Two Channel, Full Duplex Communication) USB 2.0 (Device only) High- and Full-Speed Device 2 SD, 256-byte read/write buffer, max 50-MHz clock and SD signaling for DMA transfers LCD Bridge 1 (8-bit or 16-bit asynchronous parallel bus) ADC (Successive Approximation [SAR]) 1 (10-bit, 4-input, 16- μs conversion time) Real-Time Clock (RTC) 1 (Crystal Input, Separate Clock Domain and Power Supply) FFT Hardware Accelerator 1 (Supports 8 to 1024-point 16-bit real and complex FFT) 6 Device Overview Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TMS320C5535 TMS320C5534 TMS320C5533 TMS320C5532 |
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