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8 page 
ADuM2400/ADuM2401/ADuM2402 Data Sheet Rev. D | Page 8 of 24 Parameter Symbol Min Typ Max Unit Test Conditions VDD2 Supply Current IDD2 (90) 5 V/3 V Operation 18 27 mA 45 MHz logic signal frequency 3 V/5 V Operation 31 43 mA 45 MHz logic signal frequency ADuM2402 Total Supply Current, Four Channels2 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 5 V/3 V Operation 1.5 2.1 mA DC to 1 MHz logic signal frequency 3 V/5 V Operation 0.9 1.5 mA DC to 1 MHz logic signal frequency VDD2 Supply Current IDD2 (Q) 5 V/3 V Operation 0.9 1.5 mA DC to 1 MHz logic signal frequency 3 V/5 V Operation 1.5 2.1 mA DC to 1 MHz logic signal frequency 10 Mbps (BRWZ and CRWZ Grades Only) VDD1 Supply Current IDD1 (10) 5 V/3 V Operation 5.6 7.0 mA 5 MHz logic signal frequency 3 V/5 V Operation 3.0 4.2 mA 5 MHz logic signal frequency VDD2 Supply Current IDD2 (10) 5 V/3 V Operation 3.0 4.2 mA 5 MHz logic signal frequency 3 V/5 V Operation 5.6 7.0 mA 5 MHz logic signal frequency 90 Mbps (CRWZ Grade Only) VDD1 Supply Current IDD1 (90) 5 V/3 V Operation 44 62 mA 45 MHz logic signal frequency 3 V/5 V Operation 24 39 mA 45 MHz logic signal frequency VDD2 Supply Current IDD2 (90) 5 V/3 V Operation 24 39 mA 45 MHz logic signal frequency 3 V/5 V Operation 44 62 mA 45 MHz logic signal frequency For All Models Input Currents IIA, IIB, IIC, IID, IE1, IE2 −10 +0.01 +10 μA 0 V ≤ VIA, VIB, VIC, VID ≤ VDD1 or VDD2, 0 V ≤ VE1, VE2 ≤ VDD1 or VDD2 Logic High Input Threshold VIH, VEH 5 V/3 V Operation 2.0 V 3 V/5 V Operation 1.6 V Logic Low Input Threshold VIL, VEL 5 V/3 V Operation 0.8 V 3 V/5 V Operation 0.4 V Logic High Output Voltages VOAH, VOBH, VOCH, VODH (VDD1 or VDD2) − 0.1 (VDD1 or VDD2) V IOx = −20 μA, VIx = VIxH (VDD1 or VDD2) − 0.4 (VDD1 or VDD2) − 0.2 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL,VOBL, VOCL, VODL 0.0 0.1 V IOx = 20 μA, VIx = VIxL 0.04 0.1 V IOx = 400 μA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS ADuM240xARWZ Minimum Pulse Width3 PW 1000 ns CL = 15 pF, CMOS signal levels Maximum Data Rate4 1 Mbps CL = 15 pF, CMOS signal levels Propagation Delay5 tPHL, tPLH 50 70 100 ns CL = 15 pF, CMOS signal levels PWD 40 ns CL = 15 pF, CMOS signal levels Propagation Delay Skew6 tPSK 50 ns CL = 15 pF, CMOS signal levels Channel-to-Channel Matching7 tPSKCD/tPSKOD 50 ns CL = 15 pF, CMOS signal levels ADuM240xBRWZ PW 100 ns CL = 15 pF, CMOS signal levels 10 Mbps CL = 15 pF, CMOS signal levels tPHL, tPLH 15 35 50 ns CL = 15 pF, CMOS signal levels |
