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GX9533-CTY Datasheet(PDF) 1 Page - Gennum Corporation |
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GX9533-CTY Datasheet(HTML) 1 Page - Gennum Corporation |
1 / 15 page 1 of 15 Proprietary & Confidential GENLINX™ II GX9533 Serial Digital 8x9 Crosspoint Data Sheet 8494 - 4 November 2009 GENLINX™ II GX9533 Serial Digital 8x9 Crosspoint www.gennum.com Features • operation beyond 622Mb/s •accepts SMPTE and PECL input levels • fully differential signal path • on-chip PECL current loads eliminate need for external pull-down resistors • capable of driving 100 Ωdifferential loads • very low 500mW power consumption • additional expansion port input for construction of larger matrices • auxiliary monitoring output • easy to configure • double latched address inputs with separate load and configure • TTL/CMOS compatible control logic inputs •single 5V power supply Applications • Serial digital video switching • Datacom or telecom switching Description The GX9533 is a high speed 8x9 serial digital crosspoint. An expansion input port eases the design of larger switching matrices by reducing PCB layers and eliminating the need for cascaded secondary switching. Decode logic and double level latching to configure the matrix are included on chip. Separate LOAD and CONFIGURE inputs allow for asynchronous configuration and synchronous switching. These latches can also be made transparent for asynchronous switching by pulling the LOAD and CONFIGURE pins high. In the power saving (PS) mode, the GX9533 has a very low power consumption of 500mW. This is accomplished by driving a 400mV output swing into the on-chip 200 Ω differential load termination in the expansion port of the next GX9533. This architecture provides a significant power savings and the elimination of external load resistors or impedance matching resistors. In applications where standard PECL levels are necessary, the GX9533 can be configured in "PECL Mode", to drive 800mVp-p into a 100 Ωdifferential load. The power consumption in this mode increases to 860mW. Figure A: GX9533 Functional Block Diagram IN0 .. 7 EXP0..7 AUX IN OA0..2 IA0..3 VCC AUX VEE VCCO STD/PECL1 STD/PECL2 CONFIG LOAD A LOAD CONFIG LATCH LOAD LATCH 16 16 16 16 3 4 2 2 2 OUT 0..7 DECODE LOGIC SWITCHING MATRIX INPUT BUFFER OUTPUT BUFFER |
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