GS9092A GenLINX® III 270Mb/s Serializer for SDI and

DVB-ASI

Data Sheet

34715 - 4

May 2010

3 of 63

Contents

Key Features........................................................................................................................................................1

Applications.........................................................................................................................................................1

Description...........................................................................................................................................................1

GS9092A Functional Block Diagram...........................................................................................................2

1. Pin Out...............................................................................................................................................................5

1.1 Pin Assignment ..................................................................................................................................5

1.2 Pin Descriptions ................................................................................................................................6

2. Electrical Characteristics ......................................................................................................................... 11

2.1 Absolute Maximum Ratings ....................................................................................................... 11

2.2 DC Electrical Characteristics ..................................................................................................... 11

2.3 AC Electrical Characteristics ..................................................................................................... 13

2.4 Solder Reflow Profiles .................................................................................................................. 15

2.5 Host Interface Maps ...................................................................................................................... 16

2.5.1 Host Interface Map (Read only registers) .................................................................. 18

2.5.2 Host Interface Map (R/W configurable registers) ................................................... 20

3. Detailed Description.................................................................................................................................. 22

3.1 Functional Overview .................................................................................................................... 22

3.2 Parallel Data Inputs ....................................................................................................................... 23

3.2.1 Parallel Input in SMPTE Mode....................................................................................... 24

3.2.2 Parallel Input in DVB-ASI Mode................................................................................... 24

3.2.3 Parallel Input in Data-Through Mode......................................................................... 24

3.2.4 I/O Buffers............................................................................................................................ 24

3.3 Internal FIFO Operation .............................................................................................................. 25

3.3.1 Video Mode ......................................................................................................................... 26

3.3.2 DVB-ASI Mode ................................................................................................................... 27

3.3.3 Ancillary Data Insertion Mode...................................................................................... 31

3.3.4 Bypass Mode ....................................................................................................................... 35

3.4 SMPTE Mode ................................................................................................................................... 35

3.4.1 I/O Status Signals............................................................................................................... 35

3.4.2 HVF Timing Signal Inputs............................................................................................... 35

3.5 DVB-ASI Mode ............................................................................................................................... 36

3.5.1 Control Signal Inputs........................................................................................................ 36

3.6 Data-Through Mode ..................................................................................................................... 37

3.7 Additional Processing Functions .............................................................................................. 37

3.7.1 Input Data Blank................................................................................................................ 37

3.7.2 Automatic Video Standard Detection......................................................................... 37

3.7.3 Packet Generation and Insertion.................................................................................. 38

3.8 Parallel-to-Serial Conversion .................................................................................................... 48

3.9 Serial Digital Data PLL ................................................................................................................. 48

3.10 Serial Digital Output .................................................................................................................. 49

3.10.1 Output Swing.................................................................................................................... 49

3.10.2 Serial Digital Output Mute Control ........................................................................... 49