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TJ2996D Datasheet(PDF) 4 Page - HTC Korea TAEJIN Technology Co. |
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TJ2996D Datasheet(HTML) 4 Page - HTC Korea TAEJIN Technology Co. |
4 / 14 page DDR Termination Regulator TJ2996 Jul. 2010 - Rev. 1.5.3 4/14 HTC Note 2. At elevated temperatures, devices must be derated based on thermal resistance. The device in the SOP8 package must be derated at θJA = 165˚ C/W junction to ambient with no heat sink. Note 3. Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation. Note 4. VIN is defined as VIN = AVIN = PVIN Note 5. Quiescent current defined as the current flow into AVIN. Note 6. The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction to ambient thermal resistance, θJA, and the ambient temperature, TA. Exceeding the maximum allowable power dissipation will cause excessive die temperature and the regulator will go into thermal shutdown. Note 7. VTT load regulation is tested by using a 10 ms current pulse and measuring VTT. Note 8. In the case of AVIN > 2.5V, minimum enable high level is AVIN * 0.7. TYPICAL OPERATING CHARACTERISTICS AVIN : 2.0V/div, VDDQ/PVIN : 1.0V/div, VREF : 500mV/div, VTT: 500mV/div, Time : 10ms/div AVIN : 2.0V/div, VDDQ/PVIN : 1.0V/div, VREF : 500mV/div, VTT : 500mV/div, Time : 10ms/div Start Up Shut Down AVIN : 2.0V/div, VDDQ/PVIN : 2.0V/div, EN : 2.0V/div, VTT : 500mV/div, Time : 10ms/div AVIN : 2.0V/div, VDDQ/PVIN : 2.0V/div, EN : 2.0V/div, VTT : 500mV/div, Time : 10ms/div Start Up by EN Shut Down by EN |
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