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MAX34561T+ Datasheet(PDF) 7 Page - Maxim Integrated Products

Part # MAX34561T+
Description  12V/5V Hot-Plug Switch
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX34561T+ Datasheet(HTML) 7 Page - Maxim Integrated Products

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12V/5V Hot-Plug Switch
7
Detailed Description
The MAX34561 has hot-plug controls for both +12V and
+5V power rails. The circuitry for the +12V and +5V con-
trols are independent of each other and can be treated
as two separate hot-plug switches, even though the GND
pin is common between the two switches. The sections
that follow are written from the +12V circuit perspective,
but also apply for the +5V switch control.
The device begins to operate when the supply voltage
VCC12 (or VCC5) exceeds its undervoltage lockout level,
VUR12 (or VUR5). At this level, the corresponding enable
circuit and TIMER12 (TIMER5) become active. Once the
device has been enabled, a gate voltage is applied to
the corresponding power MOSFET, allowing current to
begin flowing from VCC12 (VCC5) to LOAD12 (LOAD5).
The speed of the output-voltage ramp is controlled by
the capacitance placed at the VRAMP12 (VRAMP5) pin.
The load current is continuously monitored during the
initial conduction (ISCL12 or ISCL5) and after the cor-
responding MOSFET is fully on (IOVL12 or IOVL5). If the
current exceeds the current limit that is set by the exter-
nal resistance at ILIM12 (ILIM5), the gate voltage of the
corresponding power MOSFET is decreased, reducing
the output current to the set current limit.
Current is limited by the device comparing the volt-
age difference between LOAD12 (LOAD5) and ILIM12
(ILIM5) to an internal reference voltage. If the output cur-
rent exceeds the limit that is set by the RILIM12 (RILIM5)
resistor, the gate voltage of the corresponding power
MOSFET is decreased, which reduces the output current
to the load.
When the output power is initially ramping up, the current
limit is ISCL12 (ISCL5). Once the corresponding MOSFET
is fully on, the current limit is IOVL12 (IOVL5). The ISCL12
(ISCL5) current limit protects the source if there is a dead
short on initial power-up.
The device acts as a fuse and automatically disables the
current flowing to the load when the temperature of the
power corresponding MOSFET has exceeded the shut-
down junction temperature, TSHDN.
Enable/Timer
The voltage level of TIMER12 (TIMER5) is compared to
an internal source (see the Functional Diagram). When
the level on the pin exceeds VON, the comparator out-
puts a low level. This then turns on the voltage ramp
circuit, enabling the device’s output. TIMER12 (TIMER5)
can be configured into one of four different modes of
operation as listed in Table 1. TIMER12 (TIMER5) pin
was designed to work with most logic families. TIMER12
(TIMER5) has at least 250mV of hysteresis between VON
and VOFF. It is recommended that any logic gate used
to drive TIMER12 (TIMER5) be tested to ensure proper
operation.
Pin Description (continued)
Table 1. TIMER_ Pin Modes
PIN
NAME
FUNCTION
22
ARD5
5V Autoretry Disable. Connect this pin to GND to disable automatic retry functionality; the device
latches off during an overtemperature fault. Leave this pin open to enable automatic retry function.
This pin contains a pullup (RPU5) to VCC5. This pin is only sampled on device power-on. If the 5V
side is not used, connect this pin to GND.
23
VRAMP5
5V Voltage Ramp Control. A capacitor connected to this pin determines the voltage ramp of the
LOAD5 output during turn-on according to the equation: dVLOAD5 = 2.3332 x (IVRAMP/CVRAMP5).
24
TIMER5
5V Enable Delay Control. A capacitor connected to this pin determines the enable delay according
to the equation: Enable Delay = CTIMER5 x (VREF5/ITIMER).
EP
Exposed Pad. Connect to ground. The EP must be soldered to ground for proper thermal and elec-
trical operation.
OPERATION MODE
TIMER PIN SETUP
Automatic Enable
No connection to TIMER12
(TIMER5)
Delayed Automatic Enable
Capacitor CTIMER_ connected
to TIMER12 (TIMER5)
Enable/Disable
Open-collector device
Enable with Delay/Disable
Open-collector device and
CTIMER_


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