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ZL9117MIRZ Datasheet(PDF) 2 Page - Intersil Corporation |
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ZL9117MIRZ Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 17 page ZL9117M 2 FN7914.1 October 21, 2011 Pin Configuration ZL9117M (21 LD QFN) TOP VIEW SDA VSET VTRK FB+ FB- PGND V25 VDD VDRV SW VIN PGND VOUT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Pin Descriptions PIN LABEL TYPE DESCRIPTION 1SDA I/O Serial data. 2SCL I/O Serial clock. 3 SA I Serial address select pin. Used to assign unique SMBus address to each module. 4 SYNC I/O Clock synchronization. Used for synchronization to external frequency reference. 5 PG O Power-good output. 6 EN I Enable input (factory setting active high). Pull up to enable PWM switching and pull down to disable PWM switching. 7 DDC I/O Digital-DC bus (open drain). Interoperability between Zilker Labs modules. 8 VR PWR Internal 5V reference used to power internal drivers. Connect 4.7μF bypass capacitor to this pin. 9 SGND PWR Signal ground. Connect to low impedance ground plane. 10 PGND PWR Power ground. Connect to low impedance ground plane. 11 V25 PWR Internal 2.5V reference used to power internal circuitry. Connect 4.7μF bypass capacitor to this pin. 12 VDD PWR Input supply voltage for controller. Connect 4.7μF bypass capacitor to this pin. 13 VDRV PWR Power supply for internal FET drivers. Connect 10μF bypass capacitor to this pin. 14 (epad) SW PWR Drive train switch node 15 (epad) VIN PWR Power supply input FET voltage. 16 (epad) PGND PWR Power ground. Connect to low impedance ground plane. 17 (epad) VOUT PWR Power supply output voltage. Output voltage from PWM. 18 FB- I Output voltage feedback. Connect to load return of ground regulation point. 19 FB+ I Output voltage feedback. Connect to output regulation point. 20 VTRK I Tracking sense input. Used to track an external voltage source. 21 VSET I Output voltage selection pin. Used to set VOUT set point and VOUT max. |
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