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LPC2134 Datasheet(PDF) 1 Page - NXP Semiconductors

Part # LPC2134
Description  ARM7-based microcontrollers with two 10-bit ADCs and 10-bit DAC
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC2134 Datasheet(HTML) 1 Page - NXP Semiconductors

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ARM7-based microcontrollers with
two 10-bit ADCs and 10-bit DAC
These powerful yet cost-effective microcontrollers have up to 512 KB of ISP/IAP Flash and up to
32 KB of SRAM. Each has up to two 10-bit A/D converters, a 10-bit D/A converter, two I2C-bus
interfaces, and Fast I/O.
60-MHz, 32-bit
microcontroller with
ARM7TDMI-Score
LPC213x
Key features
4
60-MHz,32-bitARM7TDMI-Swith
AHB/APBinterfaces
4
Upto512KBISP/IAPFlash
4
Upto32KBSRAM
4
VeryfastFlashprogrammingviaon-
chipbootloadersoftware
4
Uptotwo10-bitA/Dconverters(with
enhancedfeaturesonLPC213x/01
versions)
4
10-bitD/Aconverter
4
Multipleserialinterfaces:twoI2C,two
UART,oneSPI,andoneSSP
4
Two32-bittimers
4
Real-timeclockandWatchdogtimer
4
7FastI/Opins(5-Vtolerant)withup
to15-MHzswitching(LPC213x/01
versionsonly)
4
Single3.3-Vsupply
4
Packages:
–LQFP64(10x10x1.4mm)
–HVQFN64(9x9x0.85mm)
Applications
4
Automotiveentertainment
4
Connectivity
4
Display
4
Communicationsgatewaysand
protocolconverters
4
Softwaremodems
4
Voicerecognition
4
Low-endimaging
TheNXPmicrocontrollerfamilyLPC213x
usesahigh-performance32-bitARM7
corethatoperatesatupto60MHz.
Eachdevicehasupto512KBofon-chip
Flashandupto32KBofon-chipSRAM
memory.
In-SystemProgramming(ISP)andIn-
ApplicationProgramming(IAP)software
minimizeprogrammingtime–each256-
bytelinetakesonly1mstoprogram,
andasingle-sectororfull-chiperase
takesonly400ms.
A128-bit-widememoryinterfaceand
apatentedmemoryacceleratorenable
32-bitcodeexecutionfromFlashwith
zerowait-states.Forapplicationswhere
codesizeiscritical,analternative16-bit
Thumbmodereducescodebymore
than30%withminimalperformance
penalties.
Eachdeviceisequippedwithupto
two10-bitA/Dconvertersanda10-bit
D/Aconverter.TheA/Dconverters
haveeightchannelsapieceand,onthe
LPC213x/01versions,resultregistersfor
eachchannel.
Multipleserialcommunications
interfacesincreasedesignflexibility,
providelargerbuffersize,anddeliver


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