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LH5164AH Datasheet(PDF) 4 Page - Sharp Corporation |
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LH5164AH Datasheet(HTML) 4 Page - Sharp Corporation |
4 / 11 page AC CHARACTERISTICS 1 (1) READ CYCLE (VCC = 5 V ±10%) PARAMETER SYMBOL 80 ns 100 ns UNIT NOTE MIN. MAX. MIN. MAX. Read cycle time tRC 80 100 ns Address access time tAA 80 100 ns Chip enable access time (CE1)tACE1 80 100 ns (CE2)tACE2 80 100 ns Output enable access time tOE 40 40 ns Output hold time tOH 10 10 ns Chip enable to output in Low-Z (CE1)tLZ1 10 10 ns 1 (CE2)tLZ2 10 10 ns 1 Output enable to output in Low-Z tOLZ 5 5 ns 1 Chip enable to output in High-Z (CE1)tHZ1 0 30 0 30 ns 1 (CE2)tHZ2 0 30 0 30 ns 1 Output disable to output in High-Z tOHZ 0 20 0 20 ns 1 (2) WRITE CYCLE (VCC = 5 V ±10%) PARAMETER SYMBOL 80 ns 100 ns UNIT NOTE MIN. MAX. MIN. MAX. Write cycle time tWC 80 100 ns Chip enable to end of write tCW 70 80 ns Address valid to end of write tAW 70 80 ns Address setup time tAS 00 ns Write pulse width tWP 60 60 ns Write recovery time tWR 00 ns Data valid to end of write tDW 40 40 ns Data hold time tDH 00 ns Output active from end of write tOW 10 10 ns 2 WE to output in High-Z tWZ 030030 ns2 OE to output in High-Z tOHZ 020020 ns2 NOTES: 1. TA = -10 to +70°C (LH5164A/AD/AN/AT), TA = -40 to +85°C (LH5164AH/AHD/AHN/AHT) 2. Active output to high-impedance and high-impedance to output active tests specified for a ±200 mV transition from steady state levels into the test load. AC TEST CONDITIONS PARAMETER MODE NOTE Input voltage amplitude 0.6 to 2.4 V Input rise/fall time 10 ns Timing reference level 1.5 V Output load conditions 1TTL + CL (100 pF) 1 NOTE: 1. Includes scope and jig capacitance. LH5164A/AH CMOS 64K (8K × 8) Static RAM 4 |
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