Technical Note

10/18

www.rohm.com

2010.10 - Rev.A

© 2010 ROHM Co., Ltd. All rights reserved.

BU9832GUL-W

4. Status register write / read command

Fig.39 Status register write command

Write status register command can write status register data. The data can be written by this command are 2 bits

BP1 (bit3) and BP0 (bit2) among 8 bits of status register. By BP1 and BP0, write disable block of EEPROM can be set. As

for this command, set CS LOW, and input ope code of write status register, and input data. Then, by making CS HIGH,

EEPROM starts writing. Write time requires time of tE/W as same as write. As for CS rise, start CS after taking the last

data bit (bit0), and before the next SCK clock starts. At other timing, command is cancelled. Write disable block is

determined by BP1 and BP0, and the block can be selected from 1/4 of memory array, 1/2, and entire memory array.

(Refer to the write disable block setting table.) To the write disabled block, write cannot be made, and only read can be

made.

*1

3bits including 1WPEN (bit7)

Fig.40 Status register read command

CS

SCK

High-Z

＊

=Don't care

0

0

0

0

1

WP E N

0

1

2

4

0

SI

SO

0

3

7

8

5

6

＊

9

10

11

12

13

14

15

＊

＊

BP1 BP0

＊＊

bit 7

bit 6

bit 5

bi t4

bit 3

bit 2

bit 1

bit 0

0

High-Z

bit7

bit6

bit5

bit4

0

0

BP0

0

BP1

bit3

bit2

bit1

bit0

13

CS

SCK

SI

1

1

10

6

0

SO

14

1

2

WEN

R/B

11

15

3

7

9

0

5

12

0

0

0

0

0

4

8

WPEN