Technical Note

BR24C21,BR24C21F,BR24C21FJ,BR24C21FV,

BU9882-W,BU9882F-W,BU9882FV-W

6/22

www.rohm.com

2011.08 - Rev.C

© 2011 ROHM Co., Ltd. All rights reserved.

●

Bidirectional mode command

○

Byte Write

When the Master generates a STOP condition, the BR24C21/F/FJ/FV begins the internal write cycle to the nonvolatile array.

Fig.10 Byte Write Cycle Timing

○

Page Write

If the Master transmits the next data instead of generating a STOP condition during the byte write cycle, the

BR24C21/F/FJ/FV transfers from byte write function to page write function. After receipt of each word, the three lower

order address bits are internally incremented by one, while the high order four bits of the word address remains

constant.

If the master transmits more than eight words, prior to generating the STOP condition, the address counter will “roll

over,” and the previous transmitted data will be overwritten.

Fig.11 Page Write Cycle Timing

○

Current Read

The BR24C21/F/FJ/FV contains an internal address counter which maintains the address of the last word accessed,

incremented by one. If the last accessed address is address “n” in a Read operation, the next Read operation will

access data from address “n+1” and increment the current address counter. If the last accessed address is address

”n” in a Write operation, the next Read operation will access data from address “n”. If the Master does not transfer an

Acknowledge, but does generate a STOP condition, the current address read operation will only provide a single byte of

data. At this point, the device discontinues transmission.

(See Fig.14 Sequential Read Cycle Timing)

Fig.12 Current Read Cycle Timing

*

*

WA

6

D7

1

1

0

0

W

R

I

T

E

S

T

A

R

T

R

/

W

A

C

K

S

T

O

P

WORD

ADDRESS

DATA

VCLK

SDA

LINE

SLAVE

ADDRESS

*

WA

0

D0

A

C

K

A

C

K

*

*:Don’t care

W

R

I

T

E

S

T

A

R

T

R

/

W

A

C

K

S

T

O

P

WORD

ADDRESS

（ ）

DATA(n)

VCLK

SDA

LINE

A

C

K

A

C

K

*:Don’t care

A

C

K

SLAVE

ADDRESS

1 0

0

1

＊

＊

＊

WA

6

D0

D7

D0

WA

0

*

DATA(n+7)

＊

＊

D7

1

1

0

0

R

E

A

D

S

T

A

R

T

R

/

W

S

T

O

P

DATA

SDA

LINE

SLAVE

ADRESS

＊

D0

A

C

K

A

C

K

*:Don

’t care