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BD60910GU-E2 Datasheet(PDF) 9 Page - Rohm |
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BD60910GU-E2 Datasheet(HTML) 9 Page - Rohm |
9 / 31 page Technical Note 9/30 www.rohm.com 2011.07 - Rev.B © 2011 ROHM Co., Ltd. All rights reserved. BD60910GU ● Timing diagram SDA SCL t SU;DAT t LOW S Sr P S t BUF t HD;STA t SU;STA t HIGH t HD;STA t HD;DAT t SU;STO ● Electrical Characteristics(Unless otherwise specified, Ta=25 ℃, VBAT=3.6V, VIO=1.8V) Parameter Symbol Standard-mode Fast-mode Unit Min. Typ. Max. Min. Typ. Max. 【 I 2C BUS format】 SCL clock frequency fSCL 0 - 100 0 - 400 kHz LOW period of the SCL clock tLOW 4.7 - - 1.3 - - μs HIGH period of the SCL clock tHIGH 4.0 - - 0.6 - - μs Hold time (repeated) START condition After this period, the first clock is generated tHD;STA 4.0 - - 0.6 - - μs Set-up time for a repeated START condition tSU;STA 4.7 - - 0.6 - - μs Data hold time tHD;DAT 0 - 3.45 0 - 0.9 μs Data set-up time tSU;DAT 250 - - 100 - - ns Set-up time for STOP condition tSU;STO 4.0 - - 0.6 - - μs Bus free time between a STOP and START condition tBUF 4.7 - - 1.3 - - μs |
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