Technical Note

8/30

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2011.07 - Rev.B

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BD60910GU

・

Writing protocol

A register address is transferred by the next 1 byte that transferred the slave address and the write-in command. The 3rd

byte writes data in the internal register written in by the 2nd byte, and after 4th byte or, the increment of register address

is carried out automatically. However, when a register address turns into the last address, it is set to 00h by the next

transmission. After the transmission end, the increment of the address is carried out.

S

A

A

A P

register address

slave address

from master to slave

from slave to master

R/W=0(write)

DATA

A

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

A7 A6 A5 A4 A3 A2 A1 A0

0

X X X X X X X

*1

*1

DATA

A=acknowledge(SDA LOW)

A=not acknowledge(SDA HIGH)

S=START condition

P=STOP condition

*1: Write Timing

register address

increment

register address

increment

・

Reading protocol

It reads from the next byte after writing a slave address and R/W bit. The register to read considers as the following

address accessed at the end, and the data of the address that carried out the increment is read after it. If an address

turns into the last address, the next byte will read out 00h. After the transmission end, the increment of the address is

carried out.

1

S

A

P

from master to slave

from slave to master

R/W=1(read)

DATA

A

DATA

slave address

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

register address

increment

X X X X X X X

A=acknowledge(SDA LOW)

A=not acknowledge(SDA HIGH)

S=START condition

P=STOP condition

register address

increment

A

・

Multiple reading protocols

After specifying an internal address, it reads by repeated START condition and changing the data transfer direction. The

data of the address that carried out the increment is read after it. If an address turns into the last address, the next byte

will read out 00h. After the transmission end, the increment of the address is carried out.

R/W=0(write)

R/W=1(read)

slave address

register address

slave address

DATA

DATA

S

A

A

A

Sr

1

0

A7 A6 A5 A4 A3 A2 A1 A0

X X X X X X X

X X X X X X X

A=acknowledge(SDA LOW)

A=not acknowledge(SDA HIGH)

S=START condition

P=STOP condition

from master to slave

from slave to master

register address

increment

register address

increment

P

A

D7D6D5 D4D3D2D1D0

D7D6D5D4D3D2D1D0 A

Sr=repeated START condition

As for reading protocol and multiple reading protocols, please do A (not acknowledge) after doing the final reading

operation. It stops with read when ending by A(acknowledge), and SDA stops in the state of Low when the reading data

of that time is 0. However, this state returns usually when SCL is moved, data is read, and A (not acknowledge) is done.