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X93256 Datasheet(PDF) 5 Page - Intersil Corporation |
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X93256 Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 7 page 5 FN8188.2 February 1, 2008 AC Timing Power-up and Power-down Requirements There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VH and VL, i.e., VCC ≥ VH,VL. The VCC ramp rate specification is always in effect. Pin Descriptions In the text, CS, INC, U/D, RH, RW, and RL are used to refer to either CS1 or CS2, etc. Note: These signals can be applied independently or at the same time. RH and RL The RH and RL pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the U/D input per potentiometer. RW The RW pin of the X93256 is the wiper terminal of the potentiometer, which is equivalent to the movable terminal of a mechanical potentiometer. Up/Down (U/D) The U/D input controls the direction of a single potentiometer’s wiper movement and whether the counter is incremented or decremented. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the pertaining potentiometer’s counter in the direction indicated by the logic level on the pertaining potentiometer’s U/D input. Chip Select (CS) A potentiometer is selected when the pertaining CS input is LOW. Its current counter value is stored in nonvolatile memory when the pertaining CS is returned HIGH while the pertaining INC input is also HIGH. After the store operation is complete the affected potentiometer will be placed in the low power standby mode until the potentiometer is selected once again. Principles of Operation There are multiple sections for each potentiometer in the X93256: an input control, a counter and decode section; the nonvolatile memory; and a resistor array. Each input control tlC INC Inactive to CS Inactive 1 µs tCPH CS Deselect Time (No store) 250 ns tCPH CS Deselect Time (Store) 10 ms tCYC INC Cycle Time 2 µs tR, tF (Note 5) INC Input Rise and Fall time 500 µs tR VCC (Note 5) VCC Power-up Rate 0.2 50 V/ms tWR Store Cycle 510 ms AC Operating Characteristics Over recommended operating conditions, unless otherwise specified. In the table, CS, INC, U/D, RH and RL are used to refer to either CS1 or CS2, etc. (Continued) SYMBOL PARAMETER MIN (Note 7) TYP (Note 4) MAX (Note 7) UNIT CS INC U/D tCI tIL tIH tCYC tID tDI tIC tCPH tF tR 10% 90% 90% (STORE) Note: CS, INC, U/D, RH and RL are used to refer to either CS1 or CS2, etc. X93256 |
Similar Part No. - X93256_08 |
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Similar Description - X93256_08 |
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