1

FN8174.3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

XDCP is a trademark of Intersil Americas Inc. Intersil (and design) is a trademark owned by Intersil Corporation

or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.

X9271

Single Supply/Low Power/256-Tap/SPI Bus

Single, Digitally Controlled (XDCP™)

Potentiometer

FEATURES

• 256 Resistor Taps

• SPI Serial Interface for Write, Read, and Transfer

Operations of Potentiometer

• Wiper Resistance, 100

• 16 Nonvolatile Data Registers

• Nonvolatile Storage of Multiple Wiper Positions

• Power-on Recall; Loads Saved Wiper Position

on Power-up

• Standby Current < 3µA Max

•50k

Ω, 100kΩ Versions of End-to-End Resistance

• 100-yr Data Retention

• Endurance: 100,000 Data Changes per Bit per

Register

• 14-Lead TSSOP

• Low-power CMOS

• Pb-free Plus Anneal Available (RoHS Compliant)

DESCRIPTION

The X9271 integrates a single, digitally controlled

potentiometer (XDCP™) on a monolithic CMOS

integrated circuit.

The digitally controlled potentiometer is implemented by

using 255 resistive elements in a series array. Between

each element are tap points connected to the wiper

terminal through switches. The position of the wiper on

the array is controlled by the user through the SPI bus

interface. The potentiometer has associated with it a

volatile Wiper Counter Register (WCR) and four

nonvolatile data registers that can be directly written to

and read by the user. The contents of the WCR control

the position of the wiper on the resistor array though the

switches. Power-up recalls the contents of the default

data register (DR0) to the WCR.

The XDCP can be used as a three-terminal

potentiometer or as a two-terminal variable resistor in

a wide variety of applications. including control,

parameter adjustments, and signal processing.

FUNCTIONAL DIAGRAM

50k

Ω and 100kΩ

POT

SPI

Bus

Power-on Recall

Wiper Counter

Register (WCR)

Data Registers

16 Bytes

Interface

Bus

Interface

and Control

Address

Data

Status

Write

Read

Transfer

Inc/Dec

Control

256 Taps

Data Sheet

June 23, 2011