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KAD5512HP-21Q48 Datasheet(PDF) 3 Page - Intersil Corporation |
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KAD5512HP-21Q48 Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 34 page 3 FN6808.3 October 1, 2009 Table of Contents Absolute Maximum Ratings ......................................... 4 Thermal Information...................................................... 4 Operating Conditions.................................................... 4 Electrical Specifications ............................................... 4 Digital Specifications .................................................... 6 Timing Diagrams ........................................................... 7 Switching Specifications .............................................. 8 Pinout/Package Information......................................... 9 Pin Descriptions - 72QFN........................................... 9 Pinout ......................................................................... 11 Pin Descriptions - 48QFN........................................... 12 Pinout ......................................................................... 13 Typical Performance Curves ........................................ 14 Theory of Operation ...................................................... 17 Functional Description ................................................ 17 Power-On Calibration ................................................. 17 User-Initiated Reset.................................................... 18 Analog Input ............................................................... 18 Clock Input ................................................................. 19 Jitter............................................................................ 20 Voltage Reference...................................................... 20 Digital Outputs ............................................................ 20 Over-Range Indicator ................................................. 20 Power Dissipation....................................................... 20 Nap/Sleep................................................................... 21 Data Format ............................................................... 21 Serial Peripheral Interface ........................................... 22 SPI Physical Interface................................................ 23 SPI Configuration....................................................... 24 Device Information ..................................................... 24 Indexed Device Configuration/Control ....................... 24 Global Device Configuration/Control.......................... 25 Device Test ................................................................ 27 SPI Memory Map ....................................................... 28 Equivalent Circuits ....................................................... 29 72 Pin/48 Pin Package Options ................................... 30 ADC Evaluation Platform ............................................. 31 Layout Considerations ................................................. 31 Split Ground and Power Planes ................................. 31 Clock Input Considerations ........................................ 31 Exposed Paddle......................................................... 31 Bypass and Filtering .................................................. 31 LVDS Outputs ............................................................ 31 LVCMOS Outputs ...................................................... 31 Unused Inputs............................................................ 31 Definitions ..................................................................... 31 Revision History ........................................................... 32 Package Outline Drawings........................................... 33 L48.7x7E.................................................................... . 33 L72.10x10D................................................................ . 34 KAD5512HP |
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