DS3231SN datasheet(6/20 Pages) MAXIM

Part #	DS3231SN

Description	Extremely Accurate I2C-Integrated RTC/TCXO/Crystal

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Manufacturer	MAXIM [Maxim Integrated Products]

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Extremely Accurate I2C-Integrated

RTC/TCXO/Crystal

6

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Data Transfer on I2C Serial Bus

SCL

NOTE: TIMING IS REFERENCED TO VIL(MAX) AND VIH(MIN).

SDA

STOP

START

REPEATED

START

tBUF

tHD:STA

tHD:DAT

tSU:DAT

tSU:STO

tHD:STA

tSP

tSU:STA

tHIGH

tR

tF

tLOW

WARNING: Negative undershoots below -0.3V while the part is in battery-backed mode may cause loss of data.

Note 2:

Limits at -40°C are guaranteed by design and not production tested.

Note 3:

All voltages are referenced to ground.

Note 4:

ICCA—SCL clocking at max frequency = 400kHz.

Note 5:

Current is the averaged input current, which includes the temperature conversion current.

Note 6:

The RST pin has an internal 50k

Ω (nominal) pullup resistor to VCC.

Note 7:

After this period, the first clock pulse is generated.

Note 8:

A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH(MIN) of the SCL signal)

to bridge the undefined region of the falling edge of SCL.

Note 9:

The maximum tHD:DAT needs only to be met if the device does not stretch the low period (tLOW) of the SCL signal.

Note 10: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT

≥ 250ns must then be met. This

is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the

low period of the SCL signal, it must output the next data bit to the SDA line tR(MAX) + tSU:DAT = 1000 + 250 = 1250ns

before the SCL line is released.

Note 11: CB—total capacitance of one bus line in pF.

Note 12: The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range of

0.0V

≤ VCC ≤ VCC(MAX) and 2.3V ≤ VBAT ≤ 3.4V.

Note 13: This delay applies only if the oscillator is enabled and running. If the EOSC bit is a 1, tREC is bypassed and RST immedi-

ately goes high. The state of RST does not affect the I2C interface, RTC, or TCXO.

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