HS-82C85RH datasheet(10/18 Pages) INTERSIL

Part #	HS-82C85RH

Description	Radiation Hardened CMOS Static Clock Controller/Generator

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Manufacturer	INTERSIL [Intersil Corporation]

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10 / 18 page

10

FN3044.3

April 20, 2007

Burn-In Circuits

STATIC CONFIGURATION

NOTES:

5. R = 10k

Ω ±10%.

6. VDD = 6.0V ±5%.

7. TA = 125°C Min.

8. Package Code: SZ (24 Lead DIP).

9. F0 is 50% duty cycle square wave pulse burst. F0 is left

low after pulse burst.

DYNAMIC CONFIGURATION

NOTES:

10. R = 10k

Ω ±10%.

11. VDD = 6.0V ±5% (Burn-In); VDD = 5.5V ±5% (Life Test).

12. TA = 125°C Min.

13. Package Code: SZ (24 Lead DIP).

14. F0 = 10kHz, 50% duty cycle.

15. F1 = F0/2; F2 = F1/2; F3 = F2/2, F4 = F3/2; F5 = F4/2.

1

4

5

8

9

10

11

12

16

17

18

19

20

21

22

23

24

15

14

13

2

3

6

7

VDD

F0

1

4

5

8

9

10

11

12

2

3

6

7

VDD

LOAD

F0

F3

F6

F5

F4

F2

F3

F1

F4

LOAD

F0

LOAD

2.7k

Ω

2.7k

Ω

VDD

16

17

18

19

20

21

22

23

24

15

14

13

Irradiation Circuit

NOTES:

16. R = 47k

Ω ±10%.

17. Pins tied to VSS (0V): Pin 9.

18. Pins with loads: 2, 5, 8, 10, 16, 18, 22.

19. Pins tied to VDD: 1, 3, 4, 6, 7, 11 - 15, 17, 19 - 21, 23, 24.

20. VDD = 5.5V ±0.5V.

LOAD

1

4

5

8

9

10

11

12

LOAD

2

3

LOAD

6

7

LOAD

5.5V

LOAD

5.5V

2.7k

Ω

2.7k

Ω

16

17

18

19

20

21

22

23

24

15

14

13

HS-82C85RH

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HS-82C85RH Datasheet(PDF) 10 Page - Intersil Corporation

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