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TMS320F28034PNQ Datasheet(PDF) 8 Page - Texas Instruments |
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TMS320F28034PNQ Datasheet(HTML) 8 Page - Texas Instruments |
8 / 157 page 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 V SSA/VREFLO ADCINB1 ADCINB2/COMP1B/AIO10 ADCINB3 ADCINB4/COMP2B/AIO12 ADCINB6/COMP3B/AIO14 ADCINB7 GPIO31/CANTXA GPIO30/CANRXA GPIO29/SCITXDA/SCLA/TZ3 V SS V DDIO TEST2 GPIO28/SCIRXDA/SDAA/TZ2 GPIO36/TMS GPIO5/EPWM3B/SPISIMOA/ECAP1 GPIO4/EPWM3A GPIO3/EPWM2B/SPISOMIA/COMP2OUT GPIO2/EPWM2A GPIO1/EPWM1B/COMP1OUT GPIO0/EPWM1A V DDIO V SS V DD VREGENZ GPIO34/COMP2OUT/COMP3OUT GPIO20/EQEP1A/COMP1OUT GPIO21/EQEP1B/COMP2OUT TMS320F28030, TMS320F28031, TMS320F28032 TMS320F28033, TMS320F28034, TMS320F28035 SPRS584E – APRIL 2009 – REVISED MARCH 2011 www.ti.com A. This figure shows the top view of the 56-pin RSH package. Shading denotes that the terminals are actually on the bottom side of the package. See Section 10, Thermal/Mechanical Data, for the 56-pin RSH mechanical drawing. B. Pin 13: VREFHI and ADCINA0 share the same pin on the 56-pin RSH device and their use is mutually exclusive to one another. C. Pin 15: VREFLO is always connected to VSSA on the 56-pin RSH device. Figure 2-1. 2803x 56-Pin RSH PQFP (Top View) 8 Introduction Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TMS320F28030 TMS320F28031 TMS320F28032 TMS320F28033 TMS320F28034 TMS320F28035 |
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