 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMX320LF2401AVFS Datasheet(PDF) 11 Page - Texas Instruments |
|
||||||||||||||||||||||||||||||
TMX320LF2401AVFS Datasheet(HTML) 11 Page - Texas Instruments |
|
|
11 / 88 page  TMS320LF2401A, TMS320LC2401A DSP CONTROLLERS SPRS161K − MARCH 2001 − REVISED JULY 2007 11 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 terminal functions (continued) Terminal Functions† (Continued) TERMINAL DESCRIPTION NAME NO. DESCRIPTION TRST 20 JTAG test reset. The function of the TCK, TDI, TDO, and TMS pins depend on the state of the TRST pin. If TRST = 1 (Test or Debugging mode), the function of these pins will be JTAG function (the GPIO function of these pins is not available). If TRST = 0 (Functional mode), these pins function as GPIO. ( ↓) NOTE: Do not use pullup resistors on TRST; it has an internal pulldown device. TRST is an active high test pin and must be maintained low at all times during normal device operation. In a low-noise environment, TRST may be left floating. In other instances, an external pulldown resistor is highly recommended. The value of this resistor should be based on drive strength of the debugger pods applicable to the design. A 2.2-k Ω resistor generally offers adequate protection. Since this is application-specific, it is recommended that each target board be validated for proper operation of the debugger and the application. XTAL1/CLKIN 6 Crystal/Clock input to PLL XTAL2 7 Crystal output VCCP¶ 26 Flash programming voltage pin. This pin must be connected to a 5-V supply for Flash programming. The Flash cannot be programmed if this pin is connected to GND. When not programming the Flash (i.e., during normal device operation), this pin can either be left connected to the 5-V supply or it can be tied to GND. This pin must not be left floating at any time. Do not use any current-limiting resistor in series with the 5-V supply on this pin. This pin is a “no connect” (NC) on ROM parts (i.e., this pin is not connected to any circuitry internal to the device). Connecting this pin to 5 V or leaving it open makes no difference on ROM parts. VDD 5 Core supply (3.3 V) VDD 25 Core supply (3.3 V) VSS 8 Core ground VSS 21 Core ground VSS 30 Core ground † Bold face type indicates function of the device pin after reset. ‡ It is highly recommended that VCCA be isolated from the digital supply voltage (and VSSA from digital ground) to maintain the specified accuracy and improve the noise immunity of the ADC. § TDI is MUXed with digital output, not digital I/O. ¶ Pin 26 is VCCP on LF2401A and is a No Connect (NC) on LC2401A. LEGEND: ↑ − Internal pullup ↓ − Internal pulldown (Typical active pullup/pulldown value is ±20 µA.) NOTE: On the target hardware, pins 13 and 14 (EMU0/EMU1) of the JTAG header must be pulled high. NOTE: The I/O pins that are MUXed with the JTAG function cannot be used while debugging, since the emulator needs complete control of the JTAG pins. While debugging, there should not be any circuitry connected on these MUXed pins that could disturb the JTAG debug process. |
Similar Part No. - TMX320LF2401AVFS |
|
Similar Description - TMX320LF2401AVFS |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
