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MSP430FR5722IPW Datasheet(PDF) 2 Page - Texas Instruments

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Part # MSP430FR5722IPW
Description  MIXED SIGNAL MICROCONTROLLER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSP430FR5722IPW Datasheet(HTML) 2 Page - Texas Instruments

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MSP430FR573x
MSP430FR572x
SLAS639
– APRIL 2011
www.ti.com
CAUTION
These products use FRAM non-volatile memory technology. FRAM retention is sensitive to extreme temperatures, such
as those experienced during reflow or hand soldering. See Absolute Maximum Ratings for more information.
DESCRIPTION
The Texas Instruments MSP430
™ family of low-power microcontrollers consists of several devices featuring
different sets of peripherals targeted for various applications. The architecture, combined with seven low-power
modes is optimized to achieve extended battery life in portable measurement applications. The device features a
powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency.
The MSP430FR572x and MSP430FR573x devices are microcontroller configurations with up to five 16-bit timers,
comparator, universal serial communication interfaces (eUSCI) supporting UART, SPI, and I2C, hardware
multiplier, DMA, real-time clock module with alarm capabilities, up to 33 I/O pins, and an optional
high-performance 10-bit analog-to-digital converter (ADC). Family members available are summarized in Table 1.
Table 1. Family Members
eUSCI
System
Channel
FRAM
SRAM
Package
Channel
Device
Clock
ADC10_B
Comp_D
Timer_A(1) Timer_B(2)
I/O
A:
(KB)
(KB)
Types
B:
(MHz)
UART/
SPI/I2C
IrDA/SPI
32
RHA
12 ext /
MSP430FR5739
16
1
24
16 ch.
3, 3
3, 3, 3
2
1
2 int ch.
30
DA
6 ext /
10 ch.
17
RGE
2 int ch.
MSP430FR5738
16
1
24
3, 3
3
1
1
8 ext /
12 ch.
21
PW(3)
2 int ch.
32
RHA(3)
MSP430FR5737(3)
16
1
24
16 ch.
3, 3
3, 3, 3
2
1
30
DA(3)
10 ch.
17
RGE(3)
MSP430FR5736(3)
16
1
24
3, 3
3
1
1
12 ch.
21
PW(3)
32
RHA
12 ext /
MSP430FR5735
8
1
24
16 ch.
3, 3
3, 3, 3
2
1
2 int ch.
30
DA(3)
6 ext /
10 ch.
17
RGE(3)
2 int ch.
MSP430FR5734(3)
8
1
24
3, 3
3
1
1
8 ext /
12 ch.
21
PW(3)
2 int ch.
32
RHA(3)
MSP430FR5733(3)
8
1
24
16 ch.
3, 3
3, 3, 3
2
1
30
DA(3)
10 ch.
17
RGE(3)
MSP430FR5732(3)
8
1
24
3, 3
3
1
1
12 ch.
21
PW(3)
32
RHA(3)
12 ext /
MSP430FR5731(3)
4
0.5
24
16 ch.
3, 3
3, 3, 3
2
1
2 int ch.
30
DA(3)
6 ext /
10 ch
17
RGE
2 int ch.
MSP430FR5730
4
0.5
24
3, 3
3
1
1
8 ext /
12 ch.
21
PW(3)
2 int ch.
32
RHA
12 ext /
MSP430FR5729
16
1
8
16 ch.
3, 3
3, 3, 3
2
1
2 int ch.
30
DA
6 ext /
10 ch.
17
RGE
2 int ch.
MSP430FR5728
16
1
8
3, 3
3
1
1
8 ext /
12 ch.
21
PW(3)
2 int ch.
(1)
Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
(2)
Each number in the sequence represents an instantiation of Timer_B with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_B, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
(3)
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© 2011, Texas Instruments Incorporated


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