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MSP430G2452IRSA16 Datasheet(PDF) 4 Page - Texas Instruments |
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MSP430G2452IRSA16 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 58 page  Clock System Brownout Protection RST/NMI DVCC DVSS MCLK Watchdog WDT+ 15-Bit Timer0_A3 3 CC Registers 16MHz CPU incl. 16 Registers Emulation 2BP JTAG Interface SMCLK ACLK Port P1 8 I/O Interrupt capability pullup/down resistors P1.x 8 Spy-Bi Wire XIN XOUT RAM 256B 256B 256B 128B Flash 8KB 4KB 2KB 1KB Comp_A+ 8 Channels P2.x Port P2 up to 8 I/O Interrupt capability pullup/down resistors up to 8 USI Universal Serial Interface SPI, I2C ADC 10-Bit 8 Ch. Autoscan 1 ch DMA MAB MDB Clock System Brownout Protection RST/NMI DVCC DVSS MCLK Watchdog WDT+ 15-Bit Timer0_A3 3 CC Registers 16MHz CPU incl. 16 Registers Emulation 2BP JTAG Interface SMCLK ACLK Port P1 8 I/O Interrupt capability pullup/down resistors P1.x 8 Spy-Bi Wire XIN XOUT RAM 256B Flash 8KB 4KB 2KB 1KB P2.x Port P2 up to 8 I/O Interrupt capability pullup/down resistors up to 8 USI Universal Serial Interface SPI, I2C Comp_A+ 8 Channels MAB MDB MSP430G2x52 MSP430G2x12 SLAS722B – DECEMBER 2010 – REVISED MARCH 2011 www.ti.com Functional Block Diagram, MSP430G2x52 NOTE: Port P2. Two pins are available on the 14/16-pin package options. Eight pins are available on the 20-pin package options. Functional Block Diagram, MSP430G2x12 NOTE: Port P2. Two pins are available on the 14/16-pin package options. Eight pins are available on the 20-pin package options. 4 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated |
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