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MSP430F4250IRGZR Datasheet(PDF) 5 Page - Texas Instruments |
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MSP430F4250IRGZR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 63 page MSP430F42x0 MIXED SIGNAL MICROCONTROLLER SLAS455D − MARCH 2005 − REVISED APRIL 2007 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MSP430F42x0 Terminal Functions TERMINAL NAME DL NO. RGZ NO. I/O DESCRIPTION TDO/TDI 1 43 I/O Test data output port. TDO/TDI data output or programming data input terminal TDI/TCLK 2 44 I Test data input or test clock input. The device protection fuse is connected to TDI/TCLK. TMS 3 45 I Test mode select. TMS is used as an input port for device programming and test. TCK 4 46 I Test clock. TCK is the clock input port for device programming and test. RST/NMI 5 47 I General-purpose digital I/O / reset input or nonmaskable interrupt input port DVCC 6 48 Digital supply voltage, positive terminal DVSS 7 1 Digital supply voltage, negative terminal XIN 8 2 I Input terminal of crystal oscillator XT1 XOUT 9 3 O Output terminal of crystal oscillator XT1 AVSS 10 4 Analog supply voltage, negative terminal AVCC 11 5 Analog supply voltage, positive terminal VREF 12 6 I/O Analog reference voltage P6.0/A0+ 13 7 I/O General-purpose digital I/O / analog input A0+ P6.1/A0− 14 8 I/O General-purpose digital I/O / analog input A0− P6.2/A1+ 15 9 I/O General-purpose digital I/O / analog input A1+ P6.3/A1− 16 10 I/O General-purpose digital I/O / analog input A1− P6.4 17 11 I/O General-purpose digital I/O P6.5 18 12 I/O General-purpose digital I/O P6.6 19 13 I/O General-purpose digital I/O P6.7 20 14 I/O General-purpose digital I/O P1.7/A2+ 21 15 I/O General-purpose digital I/O / analog input A2+ P1.6/A2− 22 16 I/O General-purpose digital I/O / analog input A2− P1.5/TACLK/ACLK/A3+ 23 17 I/O General-purpose digital I/O / Timer_A, clock signal TACLK input / ACLK output (divided by 1, 2, 4, or 8) / analog input A3+ P1.4/A3−/DAC0 24 18 I/O General-purpose digital I/O / analog input A3− / DAC12 output P1.3/TA2/A4+ 25 19 I/O General-purpose digital I/O / Timer_A, Capture: CCI2A, compare: Out2 output / analog input A4+ P1.2/TA1/A4− 26 20 I/O General-purpose digital I/O / Timer_A, Capture: CCI1A, compare: Out1 output / analog input A4− P1.1/TA0/MCLK 27 21 I/O General-purpose digital I/O / Timer_A. Capture: CCI0B / MCLK output. Note: TA0 is only an input on this pin / BSL Receive P1.0/TA0 28 22 I/O General-purpose digital I/O / Timer_A. Capture: CCI0A input, compare: Out0 output / BSL Transmit LCDREF/R13 29 23 External LCD reference voltage input / input port of third most positive analog LCD level (V4 or V3) LCDCAP/R23 30 24 Capacitor connection for LCD charge pump / input port of second most positive analog LCD level (V2) P5.1/S0 31 25 I/O General-purpose digital I/O / LCD segment output 0 P5.0/S1 32 26 I/O General-purpose digital I/O / LCD segment output 1 P5.5/S2 33 27 I/O General-purpose digital I/O / LCD segment output 2 P5.6/S3 34 28 I/O General-purpose digital I/O / LCD segment output 3 P5.7/S4 35 29 I/O General-purpose digital I/O / LCD segment output 4 S5 36 30 O LCD segment output 5 P2.7/S6 37 31 I/O General-purpose digital I/O / LCD segment output 6 P2.6/S7 38 32 I/O General-purpose digital I/O / LCD segment output 7 |
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