 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
PCA9564BS Datasheet(PDF) 6 Page - NXP Semiconductors |
|
||||||||||||||||||||||||||||||
PCA9564BS Datasheet(HTML) 6 Page - NXP Semiconductors |
|
|
6 / 32 page  Philips Semiconductors Product data sheet PCA9564 Parallel bus to I2C-bus controller 2006 Sep 01 6 release the PCA9564 from the I2C-bus since, when ENSIO is reset, the I2C-bus status is lost. The AA flag should be used instead (see description of the AA flag in the following text). In the following text, it is assumed that ENSIO = “1”. • STA, THE START FLAG STA = “1”: When the STA bit is set to enter a master mode, the SIO hardware checks the status of the I2C-bus and generates a START condition if the bus is free. If the bus is not free, then SIO waits for a STOP condition (which will free the bus) and generates a START condition after the minimum buffer time (tBUF) has elapsed. If STA is set while SIO is already in a master mode and one or more bytes are transmitted or received, SIO transmits a repeated START condition. STA may be set at any time. STA may also be set when SIO is an addressed slave. STA = “0”: When the STA bit is reset, no START condition or repeated START condition will be generated. • STO, THE STOP FLAG STO = “1”: When the STO bit is set while SIO is in a master mode, a STOP condition is transmitted to the I2C-bus. When the STOP condition is detected on the bus, the SIO hardware clears the STO flag. If the STA and STO bits are both set, then a STOP condition is transmitted to the I2C-bus if SIO is in a master mode. SIO then transmits a START condition. STO = “0”: When the STO bit is reset, no STOP condition will be generated. • SI, THE SERIAL INTERRUPT FLAG SI = “1”: When the SI flag is set, then, if the ENSIO bit is also set, a serial interrupt is requested. SI is set by hardware when one of 24 of the 25 possible SIO states is entered. The only state that does not cause SI to be set is state F8H, which indicates that no relevant state information is available. While SI is set, the LOW period of the serial clock on the SCL line is stretched, and the serial transfer is suspended. A HIGH level on the SCL line is unaffected by the serial interrupt flag. SI must be reset by writing “0” to the SI bit. The SI bit cannot be set by the user. SI = “0”: When the SI flag is reset, no serial interrupt is requested, and there is no stretching of the serial clock on the SCL line. • AA, THE ASSERT ACKNOWLEDGE FLAG AA = “1”: If the AA flag is set, an acknowledge (LOW level to SDA) will be returned during the acknowledge clock pulse on the SCL line when: – The “own slave address” has been received – A data byte has been received while SIO is in the master receiver mode – A data byte has been received while SIO is in the addressed slave receiver mode AA = “0”: if the AA flag is reset, a not acknowledge (HIGH level to SDA) will be returned during the acknowledge clock pulse on SCL when: – A data byte has been received while SIO is in the master receiver mode – A data byte has been received while SIO is in the addressed slave receiver mode – “Own slave address” has been received When SIO is in the addressed slave transmitter mode, state C8H will be entered after the last serial is transmitted (see Figure 5). When SI is cleared, enters the not addressed slave receiver mode, and the SDA line remains at a HIGH level. In state C8H, the AA flag can be set again for future address recognition. When SIO is in the not addressed slave mode, its own slave address is ignored. Consequently, no acknowledge is returned, and a serial interrupt is not requested. Thus, SIO can be temporarily released from the I2C-bus while the bus status is monitored. While SIO is released from the bus, START and STOP conditions are detected, and serial data is shifted in. Address recognition can be resumed at any time by setting the AA flag. • THE CLOCK RATE BITS, CR2, CR1, AND CR0 Three bits determine the serial clock frequency when SIO is in master mode. The various serial rates are shown in Table 1. The clock frequencies only take the HIGH and LOW times into consideration. The rise and fall time will cause the actual measured frequency to be lower than expected. The frequencies shown in Table 1 are unimportant when SIO is in a slave mode. In the slave modes, SIO will automatically synchronize with any clock frequency up to 400 kHz. Table 1. Serial Clock Rates CR2 CR1 CR0 SERIAL CLOCK FREQUENCY (kHz) 0 0 0 330 0 0 1 288 0 1 0 217 0 1 1 146 1 0 0 881 1 0 1 59 1 1 0 44 1 1 1 36 NOTE: 1. The clock frequency values are approximate and may vary with temperature, supply voltage, process, and SCL output loading. If normal mode I2C parameters must be strictly followed (SCL < 100kHz), it is recommended not to use CR[2:0] = 100 (SCL = 88kHz) since the clock frequency might be slightly higher than 100 kHz under certain temperature, voltage, and process conditions and use CR[2:0] = 101 (SCL = 59 kHz) instead. The Status Register, I2CSTA: I2CSTA is an 8-bit read-only register. The three least significant bits are always zero. The five most significant bits contain the status code. There are 25 possible status codes. When I2CSTA contains F8H, no relevant state information is available and no serial interrupt is requested. All other I2CSTA values correspond to defined SIO states. When each of these states is entered, a serial interrupt is requested (SI = “1”). |
Similar Part No. - PCA9564BS |
|
Similar Description - PCA9564BS |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
