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PCF8593P Datasheet(PDF) 1 Page - NXP Semiconductors |
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PCF8593P Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 35 page 1. General description The PCF8593 is a CMOS1 clock and calendar circuit, optimized for low power consumption. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each written or read data byte. The built-in 32.768 kHz oscillator circuit and the first 8 bytes of the RAM are used for the clock, calendar, and counter functions. The next 8 bytes can be programmed as alarm registers or used as free RAM space. 2. Features and benefits I2C-bus interface operating supply voltage: 2.5 V to 6.0 V Clock operating supply voltage 1.0 V to 6.0 V at 0 °Cto+70 °C 8 bytes scratchpad RAM (when alarm not used) Data retention voltage: 1.0 V to 6.0 V External RESET input resets I2C interface only Operating current (at fSCL = 0 Hz, 32 kHz time base, VDD = 2.0 V): typical 1 μA Clock function with four year calendar Universal timer with alarm and overflow indication 24 hour or 12 hour format 32.768 kHz or 50 Hz time base Serial input and output bus (I2C-bus) Automatic word address incrementing Programmable alarm, timer, and interrupt function Space-saving SO8 package available Slave addresses: A3h for reading, A2h for writing 3. Ordering information PCF8593 Low power clock and calendar Rev. 04 — 6 October 2010 Product data sheet 1. The definition of the abbreviations and acronyms used in this data sheet can be found in Section 14. Table 1. Ordering information Type number Package Name Description Version PCF8593P DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1 PCF8593T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 |
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Similar Description - PCF8593P |
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