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C2220C106M5R1C7289 Datasheet(PDF) 2 Page - Kemet Corporation |
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C2220C106M5R1C7289 Datasheet(HTML) 2 Page - Kemet Corporation |
2 / 16 page © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1020-4 • 6/22/2010 22 Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Dimensions – Millimeters (Inches) Outline Drawing Qualification/Certification Commercial grade products meet or exceed the performance and reliability standards outlined in Table 4 - Performance and Reliability of this specification. Environmental Compliance RoHS PRC ( Peoples Republic of China) compliant Electrical Parameters/Characteristics To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits. Capacitance and Dissipation Factor (DF) measured under the following conditions: 1kHz ± 50Hz and 1.0 ± 0.2 Vrms if capacitance ≤10µF 120Hz ± 10Hz and 0.5 ± 0.1 Vrms if capacitance >10µF Chip Stack EIA Size Code Metric Size Code L Length W Width T Thickness LW Lead Width Mounting Technique Single 1210 3225 3.50 (.138) ± 0.30 (.012) 2.60 (.102) ± 0.30 (.012) 3.35 (.132) ± 0.10 (.004) 0.80 (.032) ± 0.15 (.006) Solder Reflow 1812 4532 5.00 (.197) ± 0.50 (.020) 3.50 (.138) ± 0.50 (.020) 2.65 (.104) ± 0.35 (.014) 1.10 (.043) ± 0.30 (.012) 2220 5650 6.00 (.236) ± 0.50 (.020) 5.00 (.197) ± 0.50 (.020) 3.50 (.138) ± 0.30 (.012) 1.60 (.063) ± 0.30 (.012) Double 1210 3225 3.50 (.138) ± 0.30 (.012) 2.60 (.102) ± 0.30 (.012) 6.15 (.242) ± 0.15 (.006) 0.80 (.031) ± 0.15 (.006) 1812 4532 5.00 (.197) ± 0.50 (.020) 3.50 (.138) ± 0.50 (.020) 5.00 (.197) ± 0.50 (.020) 1.10 (.043) ± 0.30 (.012) 2220 5650 6.00 (.236) ± 0.50 (.020) 5.00 (.197) ± 0.50 (.020) 5.00 (.197) ± 0.50 (.020) 1.60 (.063) ± 0.30 (.012) Operating Temperature Range: -55°C to +125°C Capacitance Change with Reference to +25°C and 0 Vdc Applied (TCC): ±15% Aging Rate (Max % Cap Loss/Decade Hour): 3.5% Dielectric Withstanding Voltage: 250% of rated voltage (5 ± 1 seconds and charge/discharge not exceeding 50mA) Dissipation Factor (DF) Maximum Limits @ 25ºC: 5% (10V), 3.5% (16V & 25V) and 2.5% (50V to 200V) Insulation Resistance (IR) Limit @ 25°C: See Insulation Resistance Limit Table page 3 Top View Profile View Single or Double Double Chip Stack Single Chip Stack Chip Stack Ref Name Material A Leadframe Phosphor Bronze - Alloy 510 B Leadframe Attach High Temp Solder C Termination Cu D Ni E Sn F Electrode Ni G Dielectric BaTiO3 |
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