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 2000 Semtech Corp.

www.semtech.com

EDGE HIGH-PERFORMANCE PRODUCTS

Edge142

PIN Description

Pin Name

Pin #

Description

Digital

IN0, IN0*

IN1, IN1*

IN2, IN2*

IN3, IN3*

41, 42

44, 45

48, 47

51, 50

The multiplexer input signals. (Differential digital inputs.)

OUT0, OUT*

OUT1, OUT1*

26, 25

14, 15

The selected and delayed output signals. (Differential ECL compatible

outputs.)

MUX OUT0, 0*

MUX OUT1, 1*

23, 22

17, 18

Selected monitor outputs. (Differential ECL compatible levels.)

S00, S01

S10, S11

32, 31

8, 9

Single-ended 10KH ECL compatible inputs which select the channel 0

and channel 1 source.

MUX0 SEL

MUX1 SEL

30

10

Single-ended 10KH ECL compatible inputs which select the two output

monitor sources.

EN*

29

Single-ended 10KH ECL compatible input which enables the delayed

outputs.

MUX EN

11

Single-ended 10KH ECL compatible input which enables the monitor

outputs.

Analog

VDELAY0

VDELAY1

39

1

Analog voltage inputs which control the amount of propagation delay for

each channel.

VFALL0

VFALL1

37

3

Analog voltage inputs which control the amount of falling edge delay for

each channel.

VMID0

VMID1

38

2

Analog voltage inputs which control the amount of pulse width

compensation for each channel.

REXT1

36

Analog input current used to establish the bias current for the VDELAY,

VFALL, and VMIDinputs.

REXT2

4

Analog input current used to establish the bias level for the delay cells.

COMP1,

COMP2

35

5

Op Amp compensation capacitors.

TDP, TDN

21, 19

Positive and negative terminals to the thermal diode string.

Power

GND

6, 12, 13, 16,

24, 27, 28, 34,

40, 43, 49, 52

Device ground (positive device supply).

VEE

7, 20, 33, 46