40V, Ultra-Low Quiescent-Current

Linear Regulators in 6-Pin TDFN/8-Pin SO

_______________________________________________________________________________________

7

OUTPUT VOLTAGE NOISE

vs. OUTPUT CAPACITANCE

μF)

14

12

810

46

2

15

30

45

60

75

90

105

120

135

150

0

022

18

16

20

MAX15006A/MAX15007A

CLAMPED LOAD DUMP

MAX15006 toc27

100ms/div

40V

13.5V

AC-COUPLED

20mV/div

Typical Operating Characteristics (continued)

Pin Description

PIN

MAX15006A/B

MAX15006C

MAX15007A/B

MAX15007C

TDFN

SO

TDFN

SO

TDFN

SO

TDFN

SO

NAME

FUNCTION

1, 2

1

1, 2

1

1, 2

1

1, 2

1

IN

Regulator Supply Input. Supply voltage ranges

from 4V to 40V. Bypass with a 0.1μF capacitor to

GND.

3

2, 3,

4, 6, 7

3

2, 3, 4,

6

—

2, 4, 6,

7

—

2, 4, 6

N.C.

No Connection. Not internally connected.

45454

545

GND

Ground

5, 6

8

6

8

5, 6

8

6

8

OUT

Regulator Output. Bypass OUT to GND with a

low-ESR capacitor with a minimum 2.2μF.

—

—

57

—

—

57

FB

Feedback Regulation Set-Point. Connect an

external resistive divider network from OUT to FB

to GND to adjust the output voltage from 1.8V to

10V.

————

3

3

3

3

EN

Active-High Enable Input. Force EN high (or

low (or leave unconnected) to place the device

in a low-power shutdown mode. EN is internally

pulled down to GND through a 0.5μA sink

current.

—————

———

EP

Exposed Pad. Internally connected to GND.

Connect EP to the ground plane for enhanced

thermal performance. Do not use EP as a

ground connection.