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LTC2379IDE-18TRPBF Datasheet(PDF) 8 Page - Linear Technology |
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LTC2379IDE-18TRPBF Datasheet(HTML) 8 Page - Linear Technology |
8 / 24 page LTC2379-18 8 237918f CHAIN (Pin 1): Chain Mode Selector Pin. When low, the LTC2379-18 operates in Normal Mode and the RDL/SDI input pin functions to enable or disable SDO. When high, the LTC2379-18 operates in Chain Mode and the RDL/ SDI pin functions as SDI, the daisychain serial data input. Logic levels are determined by 0VDD. VDD (Pin 2): 2.5V Power Supply. The range of VDD is 2.375V to 2.625V. Bypass VDDtoGNDwitha10µFceramic capacitor. GND (Pins 3, 6, 10 and 16): Ground. IN+, IN– (Pins 4, 5): Positive and Negative Differential Analog Inputs. REF (Pin 7): Reference Input. The range of REF is 2.5V to 5.1V. This pin is referred to the GND pin and should be decoupled closely to the pin with a 47µF ceramic capacitor (X5R, 0805 size). REF/DGC(Pin8):WhentiedtoREF,digitalgaincompression isdisabledandtheLTC2379-18definesfull-scaleaccording to the ±VREF analog input range. When tied to GND, digital gain compression is enabled and the LTC2379-18 defines full-scale with inputs that swing between 10% and 90% of the ±VREF analog input range. CNV (Pin 9): Convert Input. A rising edge on this input powers up the part and initiates a new conversion. Logic levels are determined by 0VDD. BUSY (Pin 11): BUSY indicator. Goes high at the start of a new conversion and returns low when the conversion has finished. Logic levels are determined by 0VDD. RDL/SDI (Pin 12): When CHAIN is low, the part is in Nor- mal Mode and the pin is treated as a bus enabling input. When CHAIN is high, the part is in chain mode and the pin is treated as a serial data input pin where data from another ADC in the daisychain is input. Logic levels are determined by 0VDD. SCK(Pin13):SerialDataClockInput.WhenSDOisenabled, the conversion result or daisychain data from another ADC is shifted out on the rising edges of this clock MSB first. Logic levels are determined by 0VDD. SDO (Pin 14): Serial Data Output. The conversion result or daisychain data is output on this pin on each rising edge of SCK MSB first. The output data is in 2’s complement format. Logic levels are determined by 0VDD. OVDD (Pin 15): I/O Interface Digital Power. The range of OVDD is 1.71V to 5.25V. This supply is nominally set to the same supply as the host interface (1.8V, 2.5V, 3.3V, or 5V). Bypass OVDD to GND with a 0.1µF capacitor. GND (Exposed Pad Pin 17 – DFN Package Only): Ground. Exposedpadmustbesoldereddirectlytothegroundplane. FUNCTIONAL BLOCK DIAGRAM PIN FUNCTIONS REF = 5V LTC2379-18 IN+ VDD = 2.5V OVDD = 1.8V to 5V IN– CHAIN CNV GND BUSY REF/DGC SDO SCK RDL/SDI CONTROL LOGIC 18-BIT SAMPLING ADC SPI PORT + – 237918 BD01 |
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