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CYUSB3014-BZXI Datasheet(PDF) 3 Page - Cypress Semiconductor |
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CYUSB3014-BZXI Datasheet(HTML) 3 Page - Cypress Semiconductor |
3 / 38 page PRELIMINARY CYUSB3014 Document Number 001-52136 Rev. *H Page 3 of 38 Functional Overview Cypress EZ-USB FX3 is the next generation USB3.0 peripheral controller providing highly integrated and flexible features that enable developers to add USB3.0 functionality to any system. EZ-USB FX3 has a fully configurable, parallel, General Programmable Interface called GPIF II, which can connect to any processor, ASIC, or FPGA. The General Programmable Interface GPIF II is an enhanced version of the GPIF in FX2LP, Cypress’s flagship USB2.0 product. It provides easy and glueless connectivity to popular interfaces such as asynchronous SRAM, asynchronous and synchronous Address Data Multiplexed interface, parallel ATA, and so on. EZ-USB FX3 has integrated USB3.0 and USB2.0 physical layer (PHYs) along with a 32-bit ARM926EJ-S microprocessor for powerful data processing and for building custom applications. It implements an ingenious architecture which enables data transfers of 320 MBps[1] from GPIF II to USB interface. An integrated USB2.0 OTG controller enables applications that need dual role usage scenarios, for example EZ-USB FX3 may function as OTG Host to MSC and HID class devices. EZ-USB FX3 contains 512 kB of on-chip SRAM for code and data. EZ-USB FX3 also provides interfaces to connect to serial peripherals such as UART, SPI, I2C, and I2S. EZ-USB FX3 comes with the easy to use EZ-USB tools providing a complete solution for fast application development. The software development kit comes with application examples for accelerating time to market. EZ-USB FX3 is fully compliant to USB3.0 v1.0 specification and is also backward compatible with USB2.0. It is also complaint with the Battery Charging Specification v1.1 and USB2.0 OTG Specification v2.0. Application Examples Figure 1 and Figure 2 show typical application diagrams for EZ-USB FX3. Figure 1 shows a typical application diagram in which EZ-USB FX3 functions as a co-processor and connects to an external processor responsible for various system level functions. Figure 2 shows a typical application diagram when EZ-USB FX3 functions as the main processor in the system. Figure 1. EZ-USB FX3 as a Co-processor Note 1. Assuming that GPIF II is configured for 32 bit data bus synchronous interface operating at 100 MHz. This number also includes protocol overheads. EZ-USB FX3 (ARM9 Core) External Serial Peripheral (example: EEPROM) CRYSTAL* POWER SUBSYSTEM GPIF II text External Processor (example: MCU/CPU/ASIC/ FPGA) Serial Interfaces (example: I2C) USB Port USB Host * A clock input may be provided on the CLKIN pin instead of a crystal input [+] Feedback [+] Feedback |
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