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CY62167EV18 Datasheet(PDF) 5 Page - Cypress Semiconductor

Part # CY62167EV18
Description  16 Mbit (1M x 16) Static RAM Automatic power down when deselected
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY62167EV18 Datasheet(HTML) 5 Page - Cypress Semiconductor

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CY62167EV18 MoBL®
Document #: 38-05447 Rev. *L
Page 5 of 16
Thermal Resistance
Parameter[11]
Description
Test Conditions
VFBGA
(6 × 8 × 1mm)
Unit
JA
Thermal resistance
(Junction to ambient)
Still air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
55
C/W
JC
Thermal resistance
(Junction to case)
16
C/W
Figure 2. AC Test Loads and Waveforms
Parameters
1.8 V
Unit
R1
13500
R2
10800
RTH
6000
VTH
0.80
V
Data Retention Characteristics
Over the Operating Range
Parameter
Description
Conditions
Min
Typ[12]
Max
Unit
VDR
VCC for data retention
1.0
V
ICCDR
[13]
Data retention current
VCC = 1.0 V, CE1 > VCC – 0.2 V or CE2 < 0.2 V or (BHE
and BLE) > VCC – 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V
––
10
A
tCDR
[11]
Chip deselect to data
retention time
0–
ns
tR
[14]
Operation recovery time
55
ns
Figure 3. Data Retention Waveform
VCC
VCC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
Rise Time = 1 V/ns
Fall Time = 1 V/ns
OUTPUT
V
Equivalent to: THÉVENIN EQUIVALENT
ALL INPUT PULSES
RTH
R1
Notes
11. Tested initially and after any design or process changes that may affect these parameters.
12. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C.
13. Chip enables (CE1 and CE2), and byte enables (BHE and BLE) must be tied to CMOS levels to meet the ISB1 /ISB2 / ICCDR spec. Other inputs can be left floating.
14. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s.
15. BHE. BLE is the AND of both BHE and BLE. Deselect the chip by either disabling the chip enable signals or by disabling both BHE and BLE.
VCC(min)
VCC(min)
tCDR
VDR > 1.0 V
DATA RETENTION MODE
tR
CE1 or
VCC
BHE
.BLE
CE2
or
[15]


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