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CY62128EV30LL-45ZXI Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY62128EV30LL-45ZXI
Description  1-Mbit (128 K x 8) Static RAM Automatic power-down when deselected
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY62128EV30LL-45ZXI Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY62128EV30 MoBL®
Document #: 38-05579 Rev. *J
Page 4 of 18
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ................................ –65 °C to +150 °C
Ambient temperature with
power applied .......................................... –55 °C to +125 °C
Supply voltage to ground
potential .......................................–0.3 V to VCC(max) + 0.3 V
DC voltage applied to outputs
in high Z State [3, 4] ......................–0.3 V to VCC(max) + 0.3 V
DC input voltage [3, 4] ...................–0.3 V to VCC(max) + 0.3 V
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(MIL-STD-883, method 3015) ................................. > 2001 V
Latch-up current .................................................... > 200 mA
Operating Range
Device
Range
Ambient
Temperature
VCC[5]
CY62128EV30LL Industrial –40 °C to +85 °C 2.2 V to 3.6 V
Electrical Characteristics
Over the Operating Range
Parameter
Description
Test Conditions
45 ns (Industrial)
Unit
Min
Typ [6]
Max
VOH
Output HIGH voltage
IOH = –0.1 mA
2.0
V
IOH = –1.0 mA, VCC > 2.70 V
2.4
V
VOL
Output LOW voltage
IOL = 0.1 mA
0.4
V
IOL = 2.1 mA, VCC > 2.70 V
0.4
V
VIH
Input HIGH voltage
VCC = 2.2 V to 2.7 V
1.8
VCC + 0.3 V
V
VCC= 2.7 V to 3.6 V
2.2
VCC + 0.3 V
V
VIL
Input LOW voltage
VCC = 2.2 V to 2.7 V
–0.3
0.6
V
VCC= 2.7 V to 3.6 V
–0.3
0.8
V
IIX
Input leakage current
GND < VI < VCC
–1
+1
µA
IOZ
Output leakage current
GND < VO < VCC, output disabled
–1
+1
µA
ICC
VCC operating supply current
f = fmax = 1/tRC
VCC = VCCmax
IOUT = 0 mA
CMOS levels
–11
16
mA
f = 1 MHz
1.3
2.0
mA
ISB1[7]
Automatic CE
power-down
current — CMOS inputs
CE1 > VCC0.2 V, CE2 < 0.2 V
VIN > VCC – 0.2 V, VIN < 0.2 V
f = fmax (address and data only),
f = 0 (OE and WE), VCC = 3.60 V
–14
µA
ISB2[7]
Automatic CE
power-down
current — CMOS inputs
CE1 > VCC – 0.2 V, CE2 < 0.2 V
VIN > VCC – 0.2 V or VIN < 0.2 V,
f = 0, VCC = 3.60 V
–14
µA
Notes
3. VIL(min) = –2.0 V for pulse durations less than 20 ns.
4. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns.
5. Full device AC operation assumes a 100 µs ramp time from 0 to VCC(min) and 200 µs wait time after VCC stabilization.
6. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C.
7. Chip enables (CE1 and CE2) must be at CMOS level to meet the ISB1 / ISB2 / ICCDR spec. Other inputs can be left floating.
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