CY29350AXI datasheet(7/13 Pages) CYPRESS

Part #	CY29350AXI

Description	2.5 V or 3.3 V, 200-MHz, 9-Output Clock Driver Nine Clock outputs: Drive up to 18 clock lines

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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7 / 13 page

CY29350

Document Number: 38-07474 Rev. *C

Page 7 of 13

AC Electrical Specifications

(VDD = 2.5 V ± 5%, TA = –40 °C to +85 °C) [6]

Parameter

Description

Condition

Min

Typ

Max

Unit

fVCO

VCO Frequency

200

–

380

MHz

fin

Input Frequency

16 Feedback

12.5

–

23.75

MHz

32 Feedback

6.25

–

11.87

Bypass mode (PLL_EN = 0)

0

–

200

fXTAL

Crystal Oscillator Frequency

10

–

23.75

MHz

frefDC

Input Duty Cycle

25

–

75

%

tr , tf

TCLK Input Rise/FallTime

0.7 V to 1.7 V

–

1.0

ns

fMAX

Maximum Output Frequency

2 Output

100

–

190

MHz

4 Output

50

–

95

8 Output

25

–

47.5

DC

Output Duty Cycle

fMAX < 100 MHz

47.5

–

52.5

%

fMAX > 100 MHz

45

–

55

tr, tf

Output Rise/Fall times

0.6V to 1.8V

0.1

–

1.0

ns

tsk(O)

Output-to-Output Skew

–

150

ps

tPLZ, HZ

Output Disable Time

–

10

ns

tPZL, ZH

Output Enable Time

–

10

ns

BW

PLL Closed Loop Bandwidth (–3 dB)

16 Feedback

–

0.7–0.9

–

MHz

32 Feedback

–

0.6–0.8

–

tJIT(CC)

Cycle-to-Cycle Jitter

Same frequency

–

150

ps

Multiple frequencies

–

250

tJIT(PER)

Period Jitter

Same frequency

–

100

ps

Multiple frequencies

–

175

tLOCK

Maximum PLL Lock Time

–

1

ms

Note

6. AC characteristics apply for parallel output termination of 50

to VTT. Parameters are guaranteed by characterization and are not 100% tested.

[+] Feedback

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