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CY25482SXI-XXXT Datasheet(PDF) 8 Page - Cypress Semiconductor

Part # CY25482SXI-XXXT
Description  Two PLL Programmable Clock Generator with Spread Spectrum
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY25482SXI-XXXT Datasheet(HTML) 8 Page - Cypress Semiconductor

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CY25402/CY25422/CY25482
Document #: 001-12565 Rev. *F
Page 8 of 14
AC Electrical Specifications
Parameter
Description
Conditions
Min
Typ
Max
Unit
FIN (crystal)
Crystal Frequency, XIN
8
–
48
MHz
FIN (clock)
Input Clock Frequency
(EXCLKIN)
8
–
166
MHz
FCLK
Output Clock Frequency
3
–
166
MHz
DC
Output Duty Cycle, All
Clocks except Ref Out
Duty Cycle is defined in Figure 5 on page 9; t1/t2,
measured at 50% of VDD
45
50
55
%
DC
Ref Out Duty Cycle
Ref In Min 45%, Max 55%
40
–
60
%
TRF1
[3]
Output Rise/Fall Time
Measured from 20% to 80% of VDD, as shown in
Figure 6 on page 9, CLOAD = 15 pF, drive strength [00]
–6.8
–
ns
TRF2
[3]
Output Rise/Fall Time
Measured from 20% to 80% of VDD, as shown in
Figure 6 on page 9, CLOAD = 15 pF, drive strength [01]
–3.4
–
ns
TRF3
[3]
Output Rise/Fall Time
Measured from 20% to 80% of VDD, as shown in
Figure 6 on page 9, CLOAD = 15 pF, drive strength [10]
–2.0
–
ns
TRF4
[3]
Output Rise/Fall Time
Measured from 20% to 80% of VDD, as shown in
Figure 6 on page 9, CLOAD = 15 pF, drive strength [11]
–1.0
–
ns
TCCJ
[3,4]
Cycle-to-cycle Jitter
(peak)
Configuration dependent. See Table 5
–
100–ps
TLOCK
[4]
PLL Lock Time
Measured from 90% of the applied power supply level
–
1
3
ms
Table 6. Configuration Example for C-C Jitter
Ref. Frequency
(MHz)
CLK1 Output
CLK2 Output
Freq. (MHz)
C-C Jitter Typ (ps)
Freq. (MHz)
C-C Jitter Typ (ps)
14.3181
8.0
134
48
92
19.2
74.25
99
8
91
27
48
67
166
103
48
48
93
166
137
Recommended Crystal Specification for SMD Package
Parameter
Description
Range 1
Range 2
Range 3
Unit
Fmin
Minimum frequency
8
14
28
MHz
Fmax
Maximum frequency
14
28
48
MHz
R1
Motional resistance (ESR)
135
50
30
C0
Shunt capacitance
4
4
2
pF
CL
Parallel load capacitance
18
14
12
pF
DL(max)
Maximum crystal drive level
300
300
300
µW
Notes
3. Guaranteed by design but not 100% tested
4. Configuration dependent.


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