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CY25482SXC-XXX Datasheet(PDF) 9 Page - Cypress Semiconductor |
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CY25482SXC-XXX Datasheet(HTML) 9 Page - Cypress Semiconductor |
9 / 14 page CY25402/CY25422/CY25482 Document #: 001-12565 Rev. *F Page 9 of 14 Test and Measurement Setup Figure 4. Test and Measurement Setup Voltage and Timing Definitions Figure 5. Duty Cycle Definition Figure 6. Rise Time = TRF, Fall Time = TRF Recommended Crystal Specification for Thru-Hole Package Parameter Description Range 1 Range 2 Range 3 Unit Fmin Minimum frequency 8 14 24 MHz Fmax Maximum frequency 14 24 32 MHz R1 Motional resistance (ESR) 90 50 30 C0 Shunt capacitance 7 7 7 pF CL Parallel load capacitance 18 12 12 pF DL(max) Maximum crystal drive level 1000 1000 1000 µW 0.1 F VDD Outputs C LOAD GND DUT Clock Output V DD 50% of V DD 0V t 1 t 2 Clock Output T RF T RF V DD 80% of V DD 20% of V DD 0V |
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