CY14B108L-ZS45XI datasheet(1/25 Pages) CYPRESS

Part #	CY14B108L-ZS45XI

Description	8-Mbit (1024 K x 8/512 K x 16) nvSRAM Infinite Read, Write, and RECALL cycles

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Manufacturer	CYPRESS [Cypress Semiconductor]

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CY14B108L

CY14B108N

8-Mbit (1024 K × 8/512 K × 16) nvSRAM

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

, CA 95134-1709

•

408-943-2600

Document #: 001-45523 Rev. *J

Revised July 13, 2011

8-Mbit (1024 K × 8/512 K × 16) nvSRAM

Features

■ 20 ns, 25 ns, and 45 ns access times

■ Internally organized as 1024 K × 8 (CY14B108L) or 512 K ×16

(CY14B108N)

■ Hands off automatic STORE on power-down with only a small

capacitor

■ STORE to QuantumTrap nonvolatile elements initiated by

software, device pin, or AutoStore on power-down

■ RECALL to SRAM initiated by software or power-up

■ Infinite Read, Write, and RECALL cycles

■ 1 million STORE cycles to QuantumTrap

■ 20 year data retention

■ Single 3 V +20, –10 operation

■ Industrial temperature

■ Packages

❐ 44-/54-pin thin small outline package (TSOP) Type II

❐ 48-ball fine-pitch ball grid array (FBGA)

■ Pb-free and restriction of hazardous substances (RoHS)

compliant

Functional Description

The Cypress CY14B108L/CY14B108N is a fast static RAM

(SRAM), with a nonvolatile element in each memory cell. The

memory is organized as 1024 Kbytes of 8 bits each or 512 K

words of 16 bits each. The embedded nonvolatile elements

incorporate QuantumTrap technology, producing the world’s

most reliable nonvolatile memory. The SRAM provides infinite

read and write cycles, while independent nonvolatile data

resides in the highly reliable QuantumTrap cell. Data transfers

from the SRAM to the nonvolatile elements (the STORE

operation) takes place automatically at power-down. On

power-up, data is restored to the SRAM (the RECALL operation)

from the nonvolatile memory. Both the STORE and RECALL

operations are also available under software control.

STATIC RAM

ARRAY

2048 X 2048 X 2

R

O

W

D

E

C

O

D

E

R

COLUMN I/O

COLUMN DEC

I

N

P

U

T

B

U

F

E

R

S

POWER

CONTROL

STORE/RECALL

CONTROL

Quatrum Trap

2048 X 2048 X 2

STORE

RECALL

V

CC

V

CAP

HSB

A

9 A10

A

11 A12 A13 A14 A15 A16

SOFTWARE

DETECT

A

14 - A2

OE

CE

WE

BHE

BLE

A

0

A

1

A

2

A

3

A

4

A

5

A

6

A

7

A

8

A

17

A

18

DQ

0

DQ

1

DQ

2

DQ

3

DQ

4

DQ

5

DQ

6

DQ

7

DQ

8

DQ

9

DQ

10

DQ

11

DQ

12

DQ

13

DQ

14

DQ

15

A

19

Logic Block Diagram [1, 2, 3]

Notes

1. Address A0–A19 for × 8 configuration and Address A0–A18 for × 16 configuration.

2. Data DQ0–DQ7 for × 8 configuration and Data DQ0–DQ15 for × 16 configuration.

3. BHE and BLE are applicable for × 16 configuration only.

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CY14B108L-ZS45XI Datasheet(PDF) 1 Page - Cypress Semiconductor

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