Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

CY14B256I-SFXIT Datasheet(PDF) 6 Page - Cypress Semiconductor

Part # CY14B256I-SFXIT
Description  256-Kbit (32 K x 8) Serial (I2C) nvSRAM with Real Time Clock Full-featured RTC
Download  41 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY14B256I-SFXIT Datasheet(HTML) 6 Page - Cypress Semiconductor

Back Button CY14B256I-SFXIT Datasheet HTML 2Page - Cypress Semiconductor CY14B256I-SFXIT Datasheet HTML 3Page - Cypress Semiconductor CY14B256I-SFXIT Datasheet HTML 4Page - Cypress Semiconductor CY14B256I-SFXIT Datasheet HTML 5Page - Cypress Semiconductor CY14B256I-SFXIT Datasheet HTML 6Page - Cypress Semiconductor CY14B256I-SFXIT Datasheet HTML 7Page - Cypress Semiconductor CY14B256I-SFXIT Datasheet HTML 8Page - Cypress Semiconductor CY14B256I-SFXIT Datasheet HTML 9Page - Cypress Semiconductor CY14B256I-SFXIT Datasheet HTML 10Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 41 page
background image
CY14C256I
CY14B256I, CY14E256I
Document #: 001-65230 Rev. *B
Page 6 of 41
High-Speed Mode (Hs-mode)
In Hs-mode, nvSRAM can transfer data at bit rates of up to
3.4 Mbit/s. A master code (0000 1XXXb) must be issued to place
the device in high-speed mode. This enables master/slave
communication for speeds up to 3.4 MHz. A stop condition will
exit Hs-mode.
Serial Data Format in Hs-mode
Serial data transfer format in Hs-mode meets the standard-mode
I2C-bus specification. Hs-mode can only commence after the
following conditions (all of which are in F/S-modes):
1. START condition (S)
2. 8-bit master code (0000 1XXXb)
3. No-acknowledge bit (A)
Single and multiple-byte reads and writes are supported. After
the device enters into Hs-mode, data transfer continues in
Hs-mode until stop condition is sent by master device. The slave
switches back to F/S-mode after a STOP condition (P). To
continue data transfer in Hs-mode, the master sends Repeated
START (Sr).
See Figure 13 on page 11 and Figure 16 on page 12 for Hs-mode
timings for read and write operation.
Figure 5. Acknowledge on the I2C Bus
handbook, full pagewidth
S
START
Condition
9
8
2
1
Clock pulse for
acknowledgement
Not acknowledge (A)
Acknowledge (A)
DATA OUTPUT
BY MASTER
DATA OUTPUT
BY SLAVE
SCL FROM
MASTER
Figure 6. Data Transfer Format in Hs-mode
handbook, full pagewidth
F/S-mode
Hs-mode
F/S-mode
AA
/
A
A
DATA
n (bytes
+ack.)
W
/
R
S
MASTER CODE
Sr SLAVE ADD.
Hs-mode continues
Sr SLAVE ADD.
P
[+] Feedback


Similar Part No. - CY14B256I-SFXIT

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY14B256I-SFXIT CYPRESS-CY14B256I-SFXIT Datasheet
2Mb / 40P
   256-Kbit (32 K 횞 8) Serial (I2C) nvSRAM with Real Time Clock
CY14B256I-SFXIT CYPRESS-CY14B256I-SFXIT Datasheet
2Mb / 41P
   256-Kbit (32 K x 8) Serial (I2C) nvSRAM with Real Time Clock
More results

Similar Description - CY14B256I-SFXIT

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY14C256I CYPRESS-CY14C256I_13 Datasheet
2Mb / 41P
   256-Kbit (32 K x 8) Serial (I2C) nvSRAM with Real Time Clock
CY14C256I CYPRESS-CY14C256I_12 Datasheet
2Mb / 40P
   256-Kbit (32 K 횞 8) Serial (I2C) nvSRAM with Real Time Clock
CY14B256P CYPRESS-CY14B256P_13 Datasheet
2Mb / 37P
   256-Kbit (32 K x 8) Serial (SPI) nvSRAM with Real Time Clock
CY14B256P_1106 CYPRESS-CY14B256P_1106 Datasheet
1Mb / 36P
   256-Kbit (32 K x 8) Serial (SPI) nvSRAM with Real Time Clock
CY14C512PA CYPRESS-CY14C512PA Datasheet
1Mb / 43P
   512-Kbit (64 K x 8) SPI nvSRAM with Real Time Clock Full-featured RTC
CY14C256PA CYPRESS-CY14C256PA_13 Datasheet
1Mb / 43P
   256-Kbit (32 K x 8) SPI nvSRAM with Real Time Clock
CY14B256P CYPRESS-CY14B256P Datasheet
2Mb / 36P
   256-Kbit (32 K 횞 8) Serial (SPI) with nvSRAM Real Time Clock
CY14B256KA CYPRESS-CY14B256KA_12 Datasheet
934Kb / 27P
   256-Kbit (32 K 횞 8) nvSRAM with Real Time Clock
CY14C064I CYPRESS-CY14C064I_13 Datasheet
2Mb / 40P
   64-Kbit (8 K x 8) Serial (I2C) nvSRAM with Real Time Clock
CY14C064I CYPRESS-CY14C064I Datasheet
2Mb / 41P
   64-Kbit (8 K x 8) Serial (I2C) nvSRAM with Real Time Clock
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com